[4.4.y-cip,01/30] ARM: shmobile: Document RZ/G1H SoC DT binding

From: Geert Uytterhoeven <geert+renesas@glider.be>

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From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <chris.paterson2@renesas.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [cip-dev] [PATCH 4.4.y-cip 01/30] ARM: shmobile: Document RZ/G1H SoC
 DT binding
Date: Fri, 28 Aug 2020 16:41:26 +0100
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Message ID	20200828154155.5827-2-biju.das.jz@bp.renesas.com (mailing list archive)
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Headers	show Return-Path: <SRS0=orj1=CG=lists.cip-project.org=bounce+64572+5291+4520428+8129116@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 535CC207DF From: Biju Das <biju.das.jz@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> Cc: Chris Paterson <chris.paterson2@renesas.com>, Biju Das <biju.das.jz@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [cip-dev] [PATCH 4.4.y-cip 01/30] ARM: shmobile: Document RZ/G1H SoC DT binding Date: Fri, 28 Aug 2020 16:41:26 +0100 Message-Id: <20200828154155.5827-2-biju.das.jz@bp.renesas.com> In-Reply-To: <20200828154155.5827-1-biju.das.jz@bp.renesas.com> References: <20200828154155.5827-1-biju.das.jz@bp.renesas.com> Precedence: Bulk Sender: cip-dev@lists.cip-project.org Mailing-List: list cip-dev@lists.cip-project.org; contact cip-dev+owner@lists.cip-project.org Reply-To: cip-dev@lists.cip-project.org Content-Type: multipart/mixed; boundary="x4YUB1uRzyNLeyAjcjMa"
Series	Add iWave RZ/G1H basic board support \| expand [4.4.y-cip,00/30] Add iWave RZ/G1H basic board support [4.4.y-cip,01/30] ARM: shmobile: Document RZ/G1H SoC DT binding [4.4.y-cip,02/30] dt-bindings: reset: rcar-rst: Document r8a7742 reset module [4.4.y-cip,03/30] soc: renesas: rcar-rst: Add support for RZ/G1H [4.4.y-cip,05/30] clk: shmobile: Document r8a7742 CPG clock support [4.4.y-cip,06/30] clk: shmobile: Document r8a7742 MSTP clock support [4.4.y-cip,07/30] clk: shmobile: Document r8a7742 CPG DIV6 clock support [4.4.y-cip,08/30] clk: shmobile: Compile clk-rcar-gen2.c when using the r8a7742 [4.4.y-cip,09/30] ARM: shmobile: r8a7742: Basic SoC support [4.4.y-cip,10/30] soc: renesas: Add Renesas R8A7742 config option [4.4.y-cip,11/30] ARM: debug-ll: Add support for r8a7742 [4.4.y-cip,12/30] ARM: shmobile: defconfig: Enable r8a7742 SoC [4.4.y-cip,13/30] ARM: multi_v7_defconfig: Enable r8a7742 SoC [4.4.y-cip,14/30] dt-bindings: serial: renesas,scifa: Document r8a7742 bindings [4.4.y-cip,15/30] dt-bindings: serial: renesas,scif: Document r8a7742 bindings [4.4.y-cip,16/30] dt-bindings: serial: renesas,scifb: Document r8a7742 bindings [4.4.y-cip,17/30] dt-bindings: serial: renesas,hscif: Document r8a7742 bindings [4.4.y-cip,18/30] dt-bindings: mmc: renesas,mmcif: Document r8a7742 DT bindings [4.4.y-cip,19/30] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support [4.4.y-cip,20/30] pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA() [4.4.y-cip,21/30] pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support [4.4.y-cip,22/30] pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group [4.4.y-cip,23/30] pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support [4.4.y-cip,24/30] ARM: dts: r8a7742: Initial SoC device tree [4.4.y-cip,25/30] dt-bindings: gpio: renesas, rcar-gpio: Add r8a7742 (RZ/G1H) support [4.4.y-cip,26/30] ARM: dts: r8a7742: Add GPIO nodes [4.4.y-cip,27/30] dt-bindings: arm: renesas: Document iW-RainboW-G21M-Qseven-RZG1H SoM [4.4.y-cip,28/30] ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM [4.4.y-cip,29/30] dt-bindings: arm: renesas: Document iW-RainboW-G21D-Qseven-RZG1H board [4.4.y-cip,30/30] ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H

[4.4.y-cip,01/30] ARM: shmobile: Document RZ/G1H SoC DT binding

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