From patchwork Wed Sep 2 07:50:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11750511 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADCB417D0 for ; Wed, 2 Sep 2020 12:46:08 +0000 (UTC) Received: from web01.groups.io (web01.groups.io [66.175.222.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 85DA22083B for ; Wed, 2 Sep 2020 12:46:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=lists.cip-project.org header.i=@lists.cip-project.org header.b="IPpCpMfH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 85DA22083B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+64572+5367+4520428+8129116@lists.cip-project.org X-Received: by 127.0.0.2 with SMTP id RP8OYY4521763xgDJKAGrh6T; Wed, 02 Sep 2020 05:46:08 -0700 X-Received: from relmlie6.idc.renesas.com (relmlie6.idc.renesas.com []) by mx.groups.io with SMTP id smtpd.web10.2331.1599033039663673523 for ; Wed, 02 Sep 2020 00:50:46 -0700 X-IronPort-AV: E=Sophos;i="5.76,381,1592838000"; d="scan'208";a="55947289" X-Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 02 Sep 2020 16:50:45 +0900 X-Received: from localhost.localdomain (unknown [172.29.51.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 411A64004BA7; Wed, 2 Sep 2020 16:50:44 +0900 (JST) From: Biju Das To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek Cc: Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller Date: Wed, 2 Sep 2020 08:50:34 +0100 Message-Id: <20200902075035.4445-5-biju.das.jz@bp.renesas.com> In-Reply-To: <20200902075035.4445-1-biju.das.jz@bp.renesas.com> References: <20200902075035.4445-1-biju.das.jz@bp.renesas.com> Precedence: Bulk List-Unsubscribe: Sender: cip-dev@lists.cip-project.org List-Id: Mailing-List: list cip-dev@lists.cip-project.org; contact cip-dev+owner@lists.cip-project.org Delivered-To: mailing list cip-dev@lists.cip-project.org Reply-To: cip-dev@lists.cip-project.org X-Gm-Message-State: bRqSM1Y5WxgfHZYnmLuLtZIqx4520428AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lists.cip-project.org; q=dns/txt; s=20140610; t=1599050768; bh=P7pWFbKkdwlKL6DfHu7WNf+7OOxN9CNWO779wClPj9k=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=IPpCpMfH3vjgzHP/Aif7XEuQnY2PkQWdGChg60rxEA/QqfGv9zQIlH3rbnl8TzdmcEA KhCPIaUwNHFqiVxUAbj4GTN4zpBV9bdmI74MahYT1oTy1s2D6OHM/HRQyfnG6vq2R7i28 yuRsctDQvIOpnfoG90SYXpxeS0O65A7tgfw= From: Lad Prabhakar commit b3850cd90edc0baad2ec47293f4ec3c929de6f76 upstream. Enable the SDHI2 controller on iWave RZ/G1H carrier board. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Link: https://lore.kernel.org/r/1590420129-7531-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven [biju: removed sd-uhs-sdr50 property, since voltage switching is not supported in 4.4 kernel] Signed-off-by: Biju Das --- arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 39 +++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts index 8ce82ad3d946..82abbb758046 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts @@ -21,6 +21,28 @@ bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait"; stdout-path = "serial2:115200n8"; }; + + vcc_sdhi2: regulator-vcc-sdhi2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio1 27 GPIO_ACTIVE_LOW>; + }; + + vccq_sdhi2: regulator-vccq-sdhi2 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1>, <1800000 0>; + }; }; &avb { @@ -48,6 +70,12 @@ groups = "scifa2_data_c"; function = "scifa2"; }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; }; &scifa2 { @@ -56,3 +84,14 @@ status = "okay"; }; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + status = "okay"; +};