From patchwork Tue Jan 5 13:57:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lad Prabhakar X-Patchwork-Id: 11998945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MIME_HEADER_CTYPE_ONLY,SPF_HELO_NONE,SPF_PASS, T_TVD_MIME_NO_HEADERS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74F66C433E6 for ; Tue, 5 Jan 2021 13:58:04 +0000 (UTC) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C617F2074D for ; Tue, 5 Jan 2021 13:58:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C617F2074D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+64572+6001+4520388+8129055@lists.cip-project.org X-Received: by 127.0.0.2 with SMTP id cEIlYY4521723xn0A4A95vOb; Tue, 05 Jan 2021 05:58:03 -0800 X-Received: from relmlie5.idc.renesas.com (relmlie5.idc.renesas.com [210.160.252.171]) by mx.groups.io with SMTP id smtpd.web11.5338.1609855082309757812 for ; Tue, 05 Jan 2021 05:58:02 -0800 X-IronPort-AV: E=Sophos;i="5.78,477,1599490800"; d="scan'208";a="68085802" X-Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Jan 2021 22:58:01 +0900 X-Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 2E11C4254F72; Tue, 5 Jan 2021 22:58:00 +0900 (JST) From: "Lad Prabhakar" To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek Cc: Biju Das Subject: [cip-dev] [PATCH v3 4.19.y-cip 01/17] dt-bindings: memory: document Renesas RPC-IF bindings Date: Tue, 5 Jan 2021 13:57:41 +0000 Message-Id: <20210105135757.11069-2-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20210105135757.11069-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20210105135757.11069-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: Bulk List-Unsubscribe: Sender: cip-dev@lists.cip-project.org List-Id: Mailing-List: list cip-dev@lists.cip-project.org; contact cip-dev+owner@lists.cip-project.org Reply-To: cip-dev@lists.cip-project.org X-Gm-Message-State: MTAcZJ3DaJ7EQNsaO3qxJgoZx4520388AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lists.cip-project.org; q=dns/txt; s=20140610; t=1609855083; bh=iTu5YY/RXayU2COJ0k3Foa+GhnaoTCm1S5zCE4HmyM0=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=QLL4XX3e05BiVqyZga8NwJCwan+7U4u9JHCKE3MvqMZwxyMI3OOSEaIicO8awdRnpBi 9qT5tIHoQys+6dQK17i+B/5PooqA8mnYAm/vi5CiX0ijE4qE3PmtSLdZ8F4RiKOI7e+q4 R8OTBCYwtvdQkQcXFjRyHDzaZn/0/OisceA= From: Sergei Shtylyov commit ab1c362061d92556bd96fd2c0b188f8e4223e3e3 upstream. Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC to be accessed via the external address space read mode or the manual mode. Document the device tree bindings for the Renesas RPC-IF found in the R-Car gen3 SoCs. Based on the original patch by Mason Yang . Signed-off-by: Sergei Shtylyov Link: https://lore.kernel.org/r/54a84c75-fa17-9976-d9a6-a69ef67c418b@cogentembedded.com Signed-off-by: Mark Brown Signed-off-by: Lad Prabhakar --- .../memory-controllers/renesas,rpc-if.yaml | 88 +++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml new file mode 100644 index 000000000000..660005601a7f --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Reduced Pin Count Interface (RPC-IF) + +maintainers: + - Sergei Shtylyov + +description: | + Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to + be accessed via the external address space read mode or the manual mode. + + The flash chip itself should be represented by a subnode of the RPC-IF node. + The flash interface is selected based on the "compatible" property of this + subnode: + - if it contains "jedec,spi-nor", then SPI is used; + - if it contains "cfi-flash", then HyperFlash is used. + +allOf: + - $ref: "/schemas/spi/spi-controller.yaml#" + +properties: + compatible: + items: + - enum: + - renesas,r8a77970-rpc-if # R-Car V3M + - renesas,r8a77980-rpc-if # R-Car V3H + - renesas,r8a77995-rpc-if # R-Car D3 + - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device + + reg: + items: + - description: RPC-IF registers + - description: direct mapping read mode area + - description: write buffer area + + reg-names: + items: + - const: regs + - const: dirmap + - const: wbuf + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "flash@[0-9a-f]+$": + type: object + properties: + compatible: + enum: + - cfi-flash + - jedec,spi-nor + +examples: + - | + #include + #include + + spi@ee200000 { + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; + reg = <0xee200000 0x200>, + <0x08000000 0x4000000>, + <0xee208000 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };