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[5.10.y-cip,28/31] arm64: defconfig: Enable RZG2L_ADC

Message ID	20211229101530.22783-29-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State	Accepted
Delegated to:	Pavel Machek
Headers	show Return-Path: <prabhakar.mahadev-lad.rj@bp.renesas.com> ip: 210.160.252.172, mailfrom: prabhakar.mahadev-lad.rj@bp.renesas.com) From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> Cc: Biju Das <biju.das.jz@bp.renesas.com> Subject: [PATCH 5.10.y-cip 28/31] arm64: defconfig: Enable RZG2L_ADC Date: Wed, 29 Dec 2021 10:15:27 +0000 Message-Id: <20211229101530.22783-29-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20211229101530.22783-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20211229101530.22783-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Series	Add sound/adc support for RZ/G2L \| expand [5.10.y-cip,00/31] Add sound/adc support for RZ/G2L [5.10.y-cip,01/31] ASoC: dt-bindings: Document RZ/G2L bindings [5.10.y-cip,02/31] ASoC: dt-bindings: sound: renesas,rz-ssi: Document DMA support [5.10.y-cip,03/31] ASoC: sh: Add RZ/G2L SSIF-2 driver [5.10.y-cip,04/31] ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel configuration parame… [5.10.y-cip,05/31] ASoC: sh: rz-ssi: Add SSI DMAC support [5.10.y-cip,06/31] ASoC: sh: rz-ssi: Fix dereference of noderef expression warning [5.10.y-cip,07/31] ASoC: sh: rz-ssi: Fix wrong operator used issue [5.10.y-cip,08/31] ASoC: sh: rz-ssi: Improve error handling in rz_ssi_dma_request function [5.10.y-cip,09/31] dt-bindings: iio: adc: Add binding documentation for Renesas RZ/G2L A/D converter [5.10.y-cip,10/31] iio: adc: Add driver for Renesas RZ/G2L A/D converter [5.10.y-cip,11/31] iio: adc: rzg2l_adc: Fix -EBUSY timeout error return [5.10.y-cip,12/31] iio: adc: rzg2l_adc: add missing clk_disable_unprepare() in rzg2l_adc_pm_runtime… [5.10.y-cip,13/31] clk: renesas: r9a07g044: Add SSIF-2 clock and reset entries [5.10.y-cip,14/31] clk: renesas: r9a07g044: Add clock and reset entries for ADC [5.10.y-cip,15/31] arm64: dts: renesas: r9a07g044: Add ADC node [5.10.y-cip,16/31] arm64: dts: renesas: r9a07g044: Add external audio clock nodes [5.10.y-cip,17/31] arm64: dts: renesas: r9a07g044: Add SSI support [5.10.y-cip,18/31] arm64: dts: renesas: r9a07g044: Add DMA support to SSI [5.10.y-cip,19/31] arm64: dts: renesas: rzg2l-smarc: Enable I2C{0,1,3} support [5.10.y-cip,20/31] arm64: dts: renesas: rzg2l-smarc: Add WM8978 sound codec [5.10.y-cip,21/31] arm64: dts: renesas: rzg2l-smarc: Enable audio [5.10.y-cip,22/31] arm64: dts: renesas: rzg2l-smarc: Add Mic routing [5.10.y-cip,23/31] arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to SOM DTSI [5.10.y-cip,24/31] arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform [5.10.y-cip,25/31] arm64: dts: renesas: rzg2l-smarc: Enable CANFD [5.10.y-cip,26/31] arm64: defconfig: Enable SOUND_SOC_RZ [5.10.y-cip,27/31] arm64: defconfig: Enable SND_SOC_WM8978 [5.10.y-cip,28/31] arm64: defconfig: Enable RZG2L_ADC [5.10.y-cip,29/31] clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK critical [5.10.y-cip,30/31] i2c: riic: Add RZ/G2L support [5.10.y-cip,31/31] arm64: defconfig: Enable RIIC

Commit Message

Lad Prabhakar Dec. 29, 2021, 10:15 a.m. UTC

commit 93207e415d134e6fbcee6a723ab4cf060ef3926e upstream.

Enable ADC driver support for Renesas RZ/G2L based platforms.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210927193551.22422-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff mbox series

Patch

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c9b0874a541e..edf32d432541 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -975,6 +975,7 @@  CONFIG_EXYNOS_ADC=y
 CONFIG_MAX9611=m
 CONFIG_QCOM_SPMI_ADC5=m
 CONFIG_ROCKCHIP_SARADC=m
+CONFIG_RZG2L_ADC=m
 CONFIG_IIO_CROS_EC_SENSORS_CORE=m
 CONFIG_IIO_CROS_EC_SENSORS=m
 CONFIG_IIO_CROS_EC_LIGHT_PROX=m