From patchwork Thu Mar 2 15:26:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Moessbauer X-Patchwork-Id: 13157414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D7AFC6FA8E for ; Thu, 2 Mar 2023 15:31:10 +0000 (UTC) Received: from mta-65-226.siemens.flowmailer.net (mta-65-226.siemens.flowmailer.net [185.136.65.226]) by mx.groups.io with SMTP id smtpd.web10.18850.1677770882136108523 for ; Thu, 02 Mar 2023 07:28:02 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=felix.moessbauer@siemens.com header.s=fm1 header.b=CV60H3Bs; spf=pass (domain: rts-flowmailer.siemens.com, ip: 185.136.65.226, mailfrom: fm-72506-20230302152759518a772272a4bfeaa2-smxwyf@rts-flowmailer.siemens.com) Received: by mta-65-226.siemens.flowmailer.net with ESMTPSA id 20230302152759518a772272a4bfeaa2 for ; Thu, 02 Mar 2023 16:27:59 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=felix.moessbauer@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=7TFLNRBcj0utWV+RqrC9SVBJ/AtrsUng5/0qya7qxWg=; b=CV60H3BsPtjzr9VIcabUxxAcTNLgyt4MKlzIqB1OUPDKEfWsD0wE1RNP1MgP9q/zfOaFIw /M5YccEtMtCbeZlHY5RWFqVl7mfyekfXdG9f8XUwEBLDKZlg9LwUWlSp/lrjaK2wnQutm1+e 5wYDal7a2YNUWOnnOwi5iTFrY1Ugo=; From: Felix Moessbauer To: cip-dev@lists.cip-project.org Cc: daniel.bovensiepen@siemens.com, jan.kiszka@siemens.com, quirin.gylstorff@siemens.com, Felix Moessbauer Subject: [isar-cip-core][PATCH v3 6/9] enhance qemu-riscv64 machine to be testable Date: Thu, 2 Mar 2023 15:26:56 +0000 Message-Id: <20230302152659.2096307-7-felix.moessbauer@siemens.com> In-Reply-To: <20230302152659.2096307-1-felix.moessbauer@siemens.com> References: <20230302152659.2096307-1-felix.moessbauer@siemens.com> MIME-Version: 1.0 X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-72506:519-21489:flowmailer List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 02 Mar 2023 15:31:10 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/10881 This patch enhances the qemu-riscv64 machine by adding a reference to u-boot. Further, we now use the qemu_riscv64 defconfig from cip-kernel-config. Signed-off-by: Felix Moessbauer --- conf/machine/qemu-riscv64.conf | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/conf/machine/qemu-riscv64.conf b/conf/machine/qemu-riscv64.conf index f1f3e87..8c1764b 100644 --- a/conf/machine/qemu-riscv64.conf +++ b/conf/machine/qemu-riscv64.conf @@ -12,4 +12,11 @@ DISTRO_ARCH = "riscv64" IMAGE_FSTYPES ?= "ext4" -KERNEL_DEFCONFIG ?= "defconfig" +USE_CIP_KERNEL_CONFIG = "1" + +KERNEL_DEFCONFIG ?= "cip-kernel-config/${KERNEL_DEFCONFIG_VERSION}/riscv/qemu_riscv64_defconfig" + +# for SWUpdate setups: watchdog is configured in U-Boot +WDOG_TIMEOUT = "0" + +PREFERRED_PROVIDER_u-boot-${MACHINE} = "u-boot-qemu-riscv64"