diff mbox series

[5.10.y-cip,7/7] arm64: dts: renesas: rzg2ul-smarc: Enable SCI0

Message ID 20230605110512.111017-8-biju.das.jz@bp.renesas.com (mailing list archive)
State Accepted
Headers show
Series Add SCI support for RZ/G2L alike SoCs | expand

Commit Message

Biju Das June 5, 2023, 11:05 a.m. UTC 
commit 52a3554bdf9dbaff42b42f0e0360f456890894d9 upstream.

DT overlay support is missing in 5.10.y-cip. So ported the changes.

Add support for enabling sci0 node and disabling can{0,1}-stb-hog nodes in
board dtsi file as its pins are shared with sci0 pins.

The sci0 node is disabled by default as PMOD_SCI0_EN is set to 0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230321114753.75038-6-biju.das.jz@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
index f9835c12023e..b672e3474705 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
@@ -15,6 +15,9 @@ 
 #define SW_SW0_DEV_SEL	1
 #define SW_ET0_EN_N	1
 
+/* Please set this macro to 1 for enabling SCI0 on PMOD1 */
+#define PMOD_SCI0_EN	0
+
 #include "rzg2ul-smarc-som.dtsi"
 #include "rzg2ul-smarc-pinfunction.dtsi"
 #include "rz-smarc-common.dtsi"
@@ -39,6 +42,29 @@  wm8978: codec@1a {
 	};
 };
 
+#if (SW_ET0_EN_N && PMOD_SCI0_EN)
+&pinctrl {
+	can0-stb-hog {
+		status = "disabled";
+	};
+
+	can1-stb-hog {
+		status = "disabled";
+	};
+
+	sci0_pins: sci0-pins {
+		pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */
+			 <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */
+	};
+};
+
+&sci0 {
+	pinctrl-0 = <&sci0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+#endif
+
 #if (SW_ET0_EN_N)
 &ssi1 {
 	pinctrl-0 = <&ssi1_pins>;