| Message ID | 20240212121914.38493-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [5.10.y-cip] cache: Kconfig: Add dependency for RISCV on AX45MP_L2_CACHE config | expand |
Hi! > csr_write() is available only for RISC-V which caused build issues with > randconfig for ax45mp_cache.c. To avoid this issue add a RISCV dependency > on AX45MP_L2_CACHE config. Looks good to me, thanks. I will apply it soon if it passes testing and if there are no other comments. Best regards, Pavel
Hi! > csr_write() is available only for RISC-V which caused build issues with > randconfig for ax45mp_cache.c. To avoid this issue add a RISCV dependency > on AX45MP_L2_CACHE config. > > Reported-by: kernel test robot <lkp@intel.com> > Closes: https://lore.kernel.org/oe-kbuild-all/202402101256.mOmaXuSb-lkp@intel.com/ > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thank you, applied. Best regards, Pavel
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index 400cb09f6bd4..aacc36685945 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -3,6 +3,7 @@ menu "Cache Drivers" config AX45MP_L2_CACHE bool "Andes Technology AX45MP L2 Cache controller" + depends on RISCV select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_SETUP_DMA_OPS
csr_write() is available only for RISC-V which caused build issues with randconfig for ax45mp_cache.c. To avoid this issue add a RISCV dependency on AX45MP_L2_CACHE config. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402101256.mOmaXuSb-lkp@intel.com/ Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- drivers/cache/Kconfig | 1 + 1 file changed, 1 insertion(+)