From patchwork Wed Mar 12 11:22:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tommaso Merciai X-Patchwork-Id: 14014196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 755DFC28B28 for ; Thu, 13 Mar 2025 01:33:36 +0000 (UTC) Received: from OS0P286CU010.outbound.protection.outlook.com (OS0P286CU010.outbound.protection.outlook.com [40.107.74.70]) by mx.groups.io with SMTP id smtpd.web11.34881.1741778858507888765 for ; Wed, 12 Mar 2025 04:27:38 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="dkim: body hash did not verify" header.i=@bp.renesas.com header.s=selector1 header.b=TBj1Jxk7; spf=pass (domain: bp.renesas.com, ip: 40.107.74.70, mailfrom: tommaso.merciai.xr@bp.renesas.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Uvn4T/zwqf+Goa9rzmuQY8tXEWK9pXi6OnIDxH3BEtotSMSgRPa6w84ev/pgP0QfcWUUy3rEiPJhbQbq9wB6jAddhPcgb5+0Mnfe9qSvmr3sQMfd0xtf3icyzNtvbgbDTR69WkZ5XujJh/ZI3+pd6oHdoomlnUV/IlLPEqH626kdUpbiuP+WR41+HbjykGhvdIjRBrqVXvsAyVD5sI7T9hmcwgY7qxJpbU5W6HfGFZv2+qLIlod1kfrkr8pQ+IMaLVg6CEMSmSdoLH9aB0orXG3uoC7et7vHzJRKY6lswIEbMTkfj0Gs/w4A3q3bcBL/iwU6fI0glOO4k7KCmXECCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ERYROq1ALQnxupXN/o1SB5hrd290JvP1IpvdJCu9BLw=; b=tFNdCeczw8ILlnfR5WD8iNP0KDF6AOONW4S1jRRNHRQ1WznDCa7VlZjeTjFH6iGx/XXGRMdY5JMZvT/54uRRUkKWRxwIamZFboBdIGLfcsOFwFlSPOLWefwSv5FcPFak7iSJUlTKUEEBB5UyTvCUyfj2eJvgpitH7vEj22N468qBOdUc6MBJGuQJt6YLA3XNxKR8uqG5RMlEoR1fiXD4zfuqnfS7wBPGqS8usn0P0Qh/1d5q0hMVcwsPcVqe8zZWF5qpQM1J4l5aDogaRKdpfrrGFzxksgwDB5ftb/oV8IOgoVOkSmWo3l7zIvA+KmiO2FLS4gB3dd2LGmPBlbqzmQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=bp.renesas.com; dmarc=pass action=none header.from=bp.renesas.com; dkim=pass header.d=bp.renesas.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bp.renesas.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ERYROq1ALQnxupXN/o1SB5hrd290JvP1IpvdJCu9BLw=; b=TBj1Jxk7laCkjf8C6uDHsGqmA+sZ1RvSFn7X1ZSJggJEOouQQZVhPiKBXVZmvkZU0k1dMcgDrWQcQLncOuSMlWFAwRNvARB+brWRO68YFaJ9QdxpS3wX6eZ//69ZmCQVpPn7zvjF/WPbLFKhiqef3Sd4MLZBZuQI0pKbQjAeCqw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=bp.renesas.com; Received: from OS9PR01MB13950.jpnprd01.prod.outlook.com (2603:1096:604:35e::5) by OSCPR01MB14981.jpnprd01.prod.outlook.com (2603:1096:604:3ac::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8511.27; Wed, 12 Mar 2025 11:27:35 +0000 Received: from OS9PR01MB13950.jpnprd01.prod.outlook.com ([fe80::244d:8815:7064:a9f3]) by OS9PR01MB13950.jpnprd01.prod.outlook.com ([fe80::244d:8815:7064:a9f3%5]) with mapi id 15.20.8511.026; Wed, 12 Mar 2025 11:27:35 +0000 From: Tommaso Merciai To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek CC: Biju Das , Lad Prabhakar , tomm.merciai@gmail.com Subject: [PATCH 6.1.y-cip 82/85] i2c: riic: Introduce helper functions for I2C read/write operations Date: Wed, 12 Mar 2025 12:22:59 +0100 Message-ID: <20250312112302.1605750-83-tommaso.merciai.xr@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250312112302.1605750-1-tommaso.merciai.xr@bp.renesas.com> References: <20250312112302.1605750-1-tommaso.merciai.xr@bp.renesas.com> X-ClientProxiedBy: FR4P281CA0246.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:f5::15) To OS9PR01MB13950.jpnprd01.prod.outlook.com (2603:1096:604:35e::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9PR01MB13950:EE_|OSCPR01MB14981:EE_ X-MS-Office365-Filtering-Correlation-Id: df1abedc-9787-4fb4-7646-08dd6158e341 X-LD-Processed: 53d82571-da19-47e4-9cb4-625a166a4a2a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|52116014|38350700014; X-Microsoft-Antispam-Message-Info: Xjg+Ga0sWAUvAK5FIdVFu4lmnae23ylHawS8d1kuGeHJS1hEQypwtvsVD4o551c9zQynw6JSzgo1W8uWNVYL5QbJ9Mbfo9Fa27VUmYYT5OU+R1q5nFzmLOO0VSpRiIoA1+RIZCKpm3Tht2L2YP1SD9Ez+lXx1xUrm/AgZ8cuvnvxKymf6M6wZwbmaVhcMoTE9L/AnyBpShxKzB00D3N0OlM5ofJG3rUPfRhACRW2r0tBFBEcxO3UDWXmYtnc3XWKzr1+QmTzyf7st9YhAxC0U+CVp1t5z/f9uIxJ5GpVYCryQUZsKlvAUN7G7PIwjpJ+Zao7Yx7ZW8rVAyd2RNZU0hMj5JDpToNmqdCMBPO6VgSjopcIy5UxYBJC4hkLgXckIRmaj/Hx+GjBkfi75bviG5Phvqrep9mWi8Kp6KWm4xxXcdHLI4gqhZkcri9ZNnULHDibT+WEXjrpla1l5bIOSsugnlNj3wytxJcYSkFxYdBbnkzLU1+5AH5MObtQGdlnxM7d4QJhPKw20Devqia7t+apyJOZvI/W8h++KfTzWvfG5Md+NjCyuUQXj4IydZR10x/h6hBM+zCHl6kUnI//bVj6oc6C4KTaUtMgn3Rw37XoOyP6ndqveSNcmq9vwVX3abKqXW0WEqpIru59YafLIdYsLJ6BYStTBL/b5NcmuBqW7SGYH/+h7Dgy7XpO+1xI8tnnGR1i40xpnrNXN56gB1DTIKHjlFfo0p+ziHCLE+nvwcCmbvGAxLCZdqfQV1ATFA6Jk+pyy9f9IJNOZcW6Mc5INpHXVNvgS8f4uBC66LIN8MwAUZwUSY4vZ9fmBnRHJs/BHgsVd302aF5rM3iFGe+/KDAYce/9v51I75/3ls3w1QjiRt620XTqF9C7l1aQCZC4UzGrvVYQX0MmZZY++er6CvXRluRAw37NAvi9j8vMNeb4r/ohW7qbsO10Snndl4omO1RXuMFE6EWg/ZnBFobpAAiiI0psFoQs7fLAQB6GXo11rW++J1EtzCguxLRyNvsnUXECEJY/kh9CzhX2Pui+rwtug5BDr6g1Jh/l5SIKPoENsD9tpUntj3u3MyHkF+zdLEERKXLJceRqTjxdk4qLvuFSQz94VsKwg0AdZwXygQBVIdssiKrTFI3/NYD8md6WeyOhAnhNHVEF0QbCB/sAYN9cBZLprigiM26oVXy2VcjCuqt0zjJKhjr+PJAlBXaytbEsRz25cxA3R+bBrPxP8icNVcHvR6oRG8M4rH8VfYRQehzg7qPHbIuXhtO5eG0xNjybczTas9A/ctVvjEdltxguUBrNV2dWSv4/b99tpHEWj6y5xI01kHph2PxqgO979WZA7p2WnycLcY0UUU0JxZUx+OH4ijZXdpJU1U1w4FHcVc3g4uGa69e98RMnff7Myg/4cRPJ9S4FHlIkLoE3l4g6pdhr9HkVbY5Zhz/nbGGx7UC6cRmuGfq6nr4e X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:OS9PR01MB13950.jpnprd01.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(52116014)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Jtwe4/nmpIBt55OWxNoPPQ6nDhSuc0qytukXs6VnrrEG1b1Xwa1aSMcrULKqjWkDW//EnJlU41Stdoi1YzIE+kkf/tt87jCg1ixj6hb/kwrQhdo0ZLihHtqVMBJDbfK72B/OQt2B8bz+7n9yXx43dX7cJ5VHlVUL5dwh4D278zXlLW4GGnwJUKY0WRZdrbD2l0v8/F8gfPxZL1+RhJlGp4ARbwM9jDK89h2lk1a3cpx/2iu0MNV7oHIPoEL5JEAEvSs1F8ggqIZtdrP4CIahQw3rZQN1L9YIiKlMDPTsZvJBhoYLDxcpUNVZGRQQzgJuDKJP5/zcKrvvjcm7ms9T9qKyi4KF+V9J6nsBh9qyQlvg7kp1isbp1fcGX2fAfA79oAZoXJw1q0ammx1BvNWuhWipSldKj5IBUOwVK/iHVVI0mASFRKi8UorlXHuXMuq8yUqB0AbDsCKggSKXRN6pWOLMZN+nMyOO927zIScdrFdSJQqSdwu/ne+ip2zzMKcT4ZPZz/WBgE5ylblQDVBj5JVSXMCarf45nuwdINdTTR4m5bfjyF1q6lUfND5i3v8fMU2Di9LjixH7j21XYYyZ7xGCE3rWRncLSQ75ZX8e2+GWc7KijJmZpwO2QGJKDLUaFXrICujeq8y7m6c62MAwmWHoYLJtvqEy89MBeaoWDaOqzRa/3Y5eHYBnksAwUFep3/kIJooySZ5rNd9Q6BOidYwBZ5eTmrxgvdw1Ie+cAXiBSxY38fHDDlfARbRaRiLxNq/IhLTRoYqtAPM9l6uh2RWernXB3bnJCEy2k6oR7DISKJbKIDD9gMzvGXq5jcJJyWX78DsnkBKgm3lDVeFen7R32cKzVTeXi+026JHqdgzMllN12ybQmizz6g1aBFtEMPkiMftUd/UmVbvItL0fLqYxkLoJEXGD5JlPOsN0RotspLnqpdzP0Nk6tr2cBCTABWHKJMzSkIXBsO3O+2n3AdBI55OBBHCi7lU0PBOk5DTHRVYgWY/OTAEtxCra5w3u/ny8wRrKiBzixlQojguTTiUYIr2RwvA83X4IndXBiaWAnlgTtp0q/5gZEvYQwGht2ynJau30GBQ36r8Ka80vLCN47qgKjuMD4BQhnbZeeYyNUSzyHxBX7RwPqfUJkj5tMZMQjfMzb4Xhz5hVbdnUeUWoEauYLVFbaRGAoUZPbEVlsrPax7S/VYIbd3xV1YbcQ7WLxj9NHH07b+QXO9GYhu/9D+CUf0c42w+vWv6h50s9egnhHD6k5db+w13g1dtoFEUELPpqWZ2Vir6+6YR+41INZwKN+6iGbWSaEnqVo64LxsWAh277UfUKahM6Oi5olXIO+8GyZ3XO7VR5d2mcXNCzGxseWNnFKV2Vu6z/v0XQZ6593PinX0ldAOGIg9jdxND66OuZPdYEpABSesHPT0j2m3gIP5XKdoWgbLxzn1xz3slLcE6XmRUcP+sB74zYF4oym7PLyk1IHbYYvVd1UJYlDf2/EzGCJBqsqBl2ksioTo46AxHy4RUnlPauBIAWwcvpPV0OBsL9Yb9kWRy5k0lcuMxGLjJuW6lOM7UCljhzU40z94Jgriy4NrfoWSD0A3pRR4V8GTJuwX1lAMh1lXWYIH/z4TLJayVe777bCyg= X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-Network-Message-Id: df1abedc-9787-4fb4-7646-08dd6158e341 X-MS-Exchange-CrossTenant-AuthSource: OS9PR01MB13950.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2025 11:27:35.5374 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: j5P3PU/XcjTINixnV26IrRIyYXq9ZkSJvsNtiCq7iqJCmrmBoVbb8JXEREIOmxXaZ7Ov/5yogB/Zm5ehV0DUEnjdqCKFObaaJ4SklbVQIurnj+csIHZ6JTnwM3F4cNwz X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSCPR01MB14981 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 13 Mar 2025 01:33:36 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/18174 From: Lad Prabhakar commit 26c7871100f2933a2827b217320366e89cef5a4c upstream. Introduce helper functions for performing I2C read and write operations in the RIIC driver. These helper functions lay the groundwork for adding support for the RZ/V2H SoC. This is essential because the register offsets for the RZ/V2H SoC differ from those of the RZ/A SoC. By abstracting the read and write operations, we can seamlessly adapt the driver to support different SoC variants without extensive modifications. This patch is part of the preparation process for integrating support for the RZ/V2H SoC into the RIIC driver. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-riic.c | 56 +++++++++++++++++++++-------------- 1 file changed, 33 insertions(+), 23 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 6f8ce656183c..46fd6c249c7e 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -106,9 +106,19 @@ struct riic_irq_desc { char *name; }; +static inline void riic_writeb(struct riic_dev *riic, u8 val, u8 offset) +{ + writeb(val, riic->base + offset); +} + +static inline u8 riic_readb(struct riic_dev *riic, u8 offset) +{ + return readb(riic->base + offset); +} + static inline void riic_clear_set_bit(struct riic_dev *riic, u8 clear, u8 set, u8 reg) { - writeb((readb(riic->base + reg) & ~clear) | set, riic->base + reg); + riic_writeb(riic, (riic_readb(riic, reg) & ~clear) | set, reg); } static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) @@ -120,7 +130,7 @@ static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) pm_runtime_get_sync(adap->dev.parent); - if (readb(riic->base + RIIC_ICCR2) & ICCR2_BBSY) { + if (riic_readb(riic, RIIC_ICCR2) & ICCR2_BBSY) { riic->err = -EBUSY; goto out; } @@ -128,7 +138,7 @@ static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) reinit_completion(&riic->msg_done); riic->err = 0; - writeb(0, riic->base + RIIC_ICSR2); + riic_writeb(riic, 0, RIIC_ICSR2); for (i = 0, start_bit = ICCR2_ST; i < num; i++) { riic->bytes_left = RIIC_INIT_MSG; @@ -136,9 +146,9 @@ static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) riic->msg = &msgs[i]; riic->is_last = (i == num - 1); - writeb(ICIER_NAKIE | ICIER_TIE, riic->base + RIIC_ICIER); + riic_writeb(riic, ICIER_NAKIE | ICIER_TIE, RIIC_ICIER); - writeb(start_bit, riic->base + RIIC_ICCR2); + riic_writeb(riic, start_bit, RIIC_ICCR2); time_left = wait_for_completion_timeout(&riic->msg_done, riic->adapter.timeout); if (time_left == 0) @@ -192,7 +202,7 @@ static irqreturn_t riic_tdre_isr(int irq, void *data) * value could be moved to the shadow shift register right away. So * this must be after updates to ICIER (where we want to disable TIE)! */ - writeb(val, riic->base + RIIC_ICDRT); + riic_writeb(riic, val, RIIC_ICDRT); return IRQ_HANDLED; } @@ -201,9 +211,9 @@ static irqreturn_t riic_tend_isr(int irq, void *data) { struct riic_dev *riic = data; - if (readb(riic->base + RIIC_ICSR2) & ICSR2_NACKF) { + if (riic_readb(riic, RIIC_ICSR2) & ICSR2_NACKF) { /* We got a NACKIE */ - readb(riic->base + RIIC_ICDRR); /* dummy read */ + riic_readb(riic, RIIC_ICDRR); /* dummy read */ riic_clear_set_bit(riic, ICSR2_NACKF, 0, RIIC_ICSR2); riic->err = -ENXIO; } else if (riic->bytes_left) { @@ -212,7 +222,7 @@ static irqreturn_t riic_tend_isr(int irq, void *data) if (riic->is_last || riic->err) { riic_clear_set_bit(riic, ICIER_TEIE, ICIER_SPIE, RIIC_ICIER); - writeb(ICCR2_SP, riic->base + RIIC_ICCR2); + riic_writeb(riic, ICCR2_SP, RIIC_ICCR2); } else { /* Transfer is complete, but do not send STOP */ riic_clear_set_bit(riic, ICIER_TEIE, 0, RIIC_ICIER); @@ -231,7 +241,7 @@ static irqreturn_t riic_rdrf_isr(int irq, void *data) if (riic->bytes_left == RIIC_INIT_MSG) { riic->bytes_left = riic->msg->len; - readb(riic->base + RIIC_ICDRR); /* dummy read */ + riic_readb(riic, RIIC_ICDRR); /* dummy read */ return IRQ_HANDLED; } @@ -239,7 +249,7 @@ static irqreturn_t riic_rdrf_isr(int irq, void *data) /* STOP must come before we set ACKBT! */ if (riic->is_last) { riic_clear_set_bit(riic, 0, ICIER_SPIE, RIIC_ICIER); - writeb(ICCR2_SP, riic->base + RIIC_ICCR2); + riic_writeb(riic, ICCR2_SP, RIIC_ICCR2); } riic_clear_set_bit(riic, 0, ICMR3_ACKBT, RIIC_ICMR3); @@ -249,7 +259,7 @@ static irqreturn_t riic_rdrf_isr(int irq, void *data) } /* Reading acks the RIE interrupt */ - *riic->buf = readb(riic->base + RIIC_ICDRR); + *riic->buf = riic_readb(riic, RIIC_ICDRR); riic->buf++; riic->bytes_left--; @@ -261,10 +271,10 @@ static irqreturn_t riic_stop_isr(int irq, void *data) struct riic_dev *riic = data; /* read back registers to confirm writes have fully propagated */ - writeb(0, riic->base + RIIC_ICSR2); - readb(riic->base + RIIC_ICSR2); - writeb(0, riic->base + RIIC_ICIER); - readb(riic->base + RIIC_ICIER); + riic_writeb(riic, 0, RIIC_ICSR2); + riic_readb(riic, RIIC_ICSR2); + riic_writeb(riic, 0, RIIC_ICIER); + riic_readb(riic, RIIC_ICIER); complete(&riic->msg_done); @@ -366,15 +376,15 @@ static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t) t->scl_rise_ns / (1000000000 / rate), cks, brl, brh); /* Changing the order of accessing IICRST and ICE may break things! */ - writeb(ICCR1_IICRST | ICCR1_SOWP, riic->base + RIIC_ICCR1); + riic_writeb(riic, ICCR1_IICRST | ICCR1_SOWP, RIIC_ICCR1); riic_clear_set_bit(riic, 0, ICCR1_ICE, RIIC_ICCR1); - writeb(ICMR1_CKS(cks), riic->base + RIIC_ICMR1); - writeb(brh | ICBR_RESERVED, riic->base + RIIC_ICBRH); - writeb(brl | ICBR_RESERVED, riic->base + RIIC_ICBRL); + riic_writeb(riic, ICMR1_CKS(cks), RIIC_ICMR1); + riic_writeb(riic, brh | ICBR_RESERVED, RIIC_ICBRH); + riic_writeb(riic, brl | ICBR_RESERVED, RIIC_ICBRL); - writeb(0, riic->base + RIIC_ICSER); - writeb(ICMR3_ACKWP | ICMR3_RDRFS, riic->base + RIIC_ICMR3); + riic_writeb(riic, 0, RIIC_ICSER); + riic_writeb(riic, ICMR3_ACKWP | ICMR3_RDRFS, RIIC_ICMR3); riic_clear_set_bit(riic, ICCR1_IICRST, 0, RIIC_ICCR1); @@ -482,7 +492,7 @@ static int riic_i2c_remove(struct platform_device *pdev) struct riic_dev *riic = platform_get_drvdata(pdev); pm_runtime_get_sync(&pdev->dev); - writeb(0, riic->base + RIIC_ICIER); + riic_writeb(riic, 0, RIIC_ICIER); pm_runtime_put(&pdev->dev); i2c_del_adapter(&riic->adapter); pm_runtime_disable(&pdev->dev);