Message ID | GVXPR10MB58372AC0B85BE9E5DF0E0D3588B72@GVXPR10MB5837.EURPRD10.PROD.OUTLOOK.COM (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | AW: [PATCH] README.m-com-x86.md: Add hardware details | expand |
On 29.07.24 11:09, Schilling, Benjamin wrote: > Hi all, > > what’s the status here? Anything I should change before it being merged? > Yeah, there were/are multiple issues: - missing [isar-cip-core] tag in subject made me miss this - you sent the patch as html - please don't, use git send-email or some suitable(!) email client (*) Jan (*) If you have Siemens-specific SMTP issues, drop me a note, there are solutions. > > > Best regards > > Benjamin > > > > *Von: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> im > Auftrag von Benjamin Schilling via lists.cip-project.org > <schilling.benjamin=siemens.com@lists.cip-project.org> > *Datum: *Montag, 8. Juli 2024 um 21:17 > *An: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> > *Betreff: *[cip-dev] [PATCH] README.m-com-x86.md: Add hardware details > > From 4e6b957569e0a4dd617cc1f4fd716c769681f6dc Mon Sep 17 00:00:00 2001 > > From: Benjamin Schilling <schilling.benjamin@siemens.com> > > Date: Mon, 8 Jul 2024 21:00:14 +0200 > > Subject: [PATCH] README.m-com-x86.md: Add hardware details > > > > Signed-off-by: Benjamin Schilling <schilling.benjamin@siemens.com> > > --- > > doc/boards/README.m-com-x86.md | 131 ++++++++++++++++++++++++++++++++- > > 1 file changed, 130 insertions(+), 1 deletion(-) > > > > diff --git a/doc/boards/README.m-com-x86.md b/doc/boards/README.m-com-x86.md > > index cbd74ad..d677b76 100644 > > --- a/doc/boards/README.m-com-x86.md > > +++ b/doc/boards/README.m-com-x86.md > > @@ -1,4 +1,73 @@ > > -# ISAR CIP Core: Instructions for M-COM RT X86 V1 > > +ISAR CIP Core: Instructions for the Siemens Mobility GmbH M-COM RT X86 V1 > > + > > +## About the M-COM RT X86 V1 > > + > > +The M-COM RT X86 V1 is an industrial grade PC. > > +It is designed to be installed on-board of trains and can be used for > communication and processing purposes or as a security gateway. > > + > > +## Hardware Specifications > > + > > +- Intel Atom E3950 CPU > > +- 8GB DDR3 DRAM soldered, ECC > > +- Trusted Platform Module V2.0 > > +- 3 Gigabit Ethernet ports (M12 X-coded) > > +- 1 USB 3.0 on front > > +- -40°C to +70°C, fanless > > +- EN 50155 compliant (railways) > > +- 16 GB eMMC storage > > +- Input voltage range: 24 - 110 V DC EN50155 > > + > > +### Power Plug Pinout > > + > > +M12 B-coded Plug > > + > > +| Column 1 | Column 2 | > > +| -------- | --------------------------- | > > +| 24-110V | Edge triggered power on | > > +| GND | Not connected | > > + > > +#### Powering the device > > + > > +The device must be connected to a powersupply providing 24V to 110V > output voltage at the "+" and "-" pins. > > +The "switch" pin is used for edge triggered power on. > > +It can be hardwired to the power supply 24V to 110V to trigger power on > of the device. > > + > > +### LED Matrix: > > + > > +| Column 1 | Column 2 | Column 3 | Column 4 | > > +| -------------- | -------------- | -------------- | ------------- | > > +| Power STBY | Power ON | WD-Trigger | Error 1 | > > +| ETH0 Link/Data | ETH1 Link/Data | ETH2 Link/Data | RS232/RS422 | > > +| Module1 | Module1 | F1 | M.2 Used/Data | > > + > > +Power STBY (Yellow): > > +- Standby: on > > +- Powering down: flashing > > + > > +Power ON (Green): > > +- Operation: on > > +- Powering up: flashing > > + > > +WD-Trigger (Yellow): > > +- Trigger pulses: flashing per pulse > > + > > +Error 1 (Red): > > +- WD-Permanent-Reset: flashing 4 Hz > > +- WD-Disabled: flashing 2 Hz > > + > > +ETHx (Yellow/Green): > > +- Link: on > > +- Data transfer: flashing > > + > > +Module1 (Yellow/Green): > > +- Module-specific > > + > > +F1 (Yellow): > > +- Controlled via Software > > + > > +M.2 (Green): > > +- Module installed:on > > +- Data transfer: flashing > > ## Build the CIP Core image > > @@ -100,3 +169,63 @@ After boot, check the dmesg for Secure Boot status > like below: > > root@demo:~# dmesg | grep Secure > > [ 0.008368] Secure boot enabled > > ``` > > + > > +## Internal interfaces > > + > > +The M-COM contains an internal serial port that can be used to access > the devices kernel console for debug purposes. > > + > > +To access it, the backside of the device has to be unscrewed. > > +Afterwards it can be connected using a Mini-USB cable. > > +Make sure to have the appropriate FTDI driver installed. > > + > > +## Software Interfaces > > + > > +The following chapter describes interfaces accessible from software level. > > + > > +### Controlling the watchdogs > > + > > +The M-COM RT x86 contains two watchdogs: > > + > > +- Custom Hardware Watchdog > > +- UEFI watchdog of efibootguard > > + > > +The UEFI watchdog is controlled via efibootguard variables. > > +It can be configured for both partition sets using `bg_setenv -p > <partition number> -w <timeout in seconds>`. > > +To confirm the new watchdog configuration use `bg_setenv -c`. > > +To disable the watchdog set the timeout to 0. > > +The watchdog is fed via `/dev/wdog`. > > + > > +The custom watchdog is controlled via I2C. > > +The following scripts can be used to control it. > > + > > +Enable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x8000 > > +# mode = w > > + > > +# enable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x8000 w > > +``` > > + > > +Disable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x0000 > > +# mode = w > > + > > +# disable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x0000 w > > +``` > > \ No newline at end of file > > -- > > 2.45.2 > > >
Hi Benjamin, Thank you for sending the patch file to include M-COM hardware specifications. Could you please resend this patch by fixing the issues pointed out by Jan? Thanks & Regards Shivanand K -----Original Message----- From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Jan Kiszka via lists.cip-project.org Sent: Monday, August 5, 2024 8:34 PM To: Schilling, Benjamin <schilling.benjamin@siemens.com>; cip-dev@lists.cip-project.org Subject: Re: [cip-dev] [PATCH] README.m-com-x86.md: Add hardware details On 29.07.24 11:09, Schilling, Benjamin wrote: > Hi all, > > what’s the status here? Anything I should change before it being merged? > Yeah, there were/are multiple issues: - missing [isar-cip-core] tag in subject made me miss this - you sent the patch as html - please don't, use git send-email or some suitable(!) email client (*) Jan (*) If you have Siemens-specific SMTP issues, drop me a note, there are solutions. > > > Best regards > > Benjamin > > > > *Von: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> > im Auftrag von Benjamin Schilling via lists.cip-project.org > <schilling.benjamin=siemens.com@lists.cip-project.org> > *Datum: *Montag, 8. Juli 2024 um 21:17 > *An: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> > *Betreff: *[cip-dev] [PATCH] README.m-com-x86.md: Add hardware details > > From 4e6b957569e0a4dd617cc1f4fd716c769681f6dc Mon Sep 17 00:00:00 2001 > > From: Benjamin Schilling <schilling.benjamin@siemens.com> > > Date: Mon, 8 Jul 2024 21:00:14 +0200 > > Subject: [PATCH] README.m-com-x86.md: Add hardware details > > > > Signed-off-by: Benjamin Schilling <schilling.benjamin@siemens.com> > > --- > > doc/boards/README.m-com-x86.md | 131 ++++++++++++++++++++++++++++++++- > > 1 file changed, 130 insertions(+), 1 deletion(-) > > > > diff --git a/doc/boards/README.m-com-x86.md > b/doc/boards/README.m-com-x86.md > > index cbd74ad..d677b76 100644 > > --- a/doc/boards/README.m-com-x86.md > > +++ b/doc/boards/README.m-com-x86.md > > @@ -1,4 +1,73 @@ > > -# ISAR CIP Core: Instructions for M-COM RT X86 V1 > > +ISAR CIP Core: Instructions for the Siemens Mobility GmbH M-COM RT > +X86 V1 > > + > > +## About the M-COM RT X86 V1 > > + > > +The M-COM RT X86 V1 is an industrial grade PC. > > +It is designed to be installed on-board of trains and can be used for > communication and processing purposes or as a security gateway. > > + > > +## Hardware Specifications > > + > > +- Intel Atom E3950 CPU > > +- 8GB DDR3 DRAM soldered, ECC > > +- Trusted Platform Module V2.0 > > +- 3 Gigabit Ethernet ports (M12 X-coded) > > +- 1 USB 3.0 on front > > +- -40°C to +70°C, fanless > > +- EN 50155 compliant (railways) > > +- 16 GB eMMC storage > > +- Input voltage range: 24 - 110 V DC EN50155 > > + > > +### Power Plug Pinout > > + > > +M12 B-coded Plug > > + > > +| Column 1 | Column 2 | > > +| -------- | --------------------------- | > > +| 24-110V | Edge triggered power on | > > +| GND | Not connected | > > + > > +#### Powering the device > > + > > +The device must be connected to a powersupply providing 24V to 110V > output voltage at the "+" and "-" pins. > > +The "switch" pin is used for edge triggered power on. > > +It can be hardwired to the power supply 24V to 110V to trigger power > +on > of the device. > > + > > +### LED Matrix: > > + > > +| Column 1 | Column 2 | Column 3 | Column 4 | > > +| -------------- | -------------- | -------------- | ------------- | > > +| Power STBY | Power ON | WD-Trigger | Error 1 | > > +| ETH0 Link/Data | ETH1 Link/Data | ETH2 Link/Data | RS232/RS422 | > > +| Module1 | Module1 | F1 | M.2 Used/Data | > > + > > +Power STBY (Yellow): > > +- Standby: on > > +- Powering down: flashing > > + > > +Power ON (Green): > > +- Operation: on > > +- Powering up: flashing > > + > > +WD-Trigger (Yellow): > > +- Trigger pulses: flashing per pulse > > + > > +Error 1 (Red): > > +- WD-Permanent-Reset: flashing 4 Hz > > +- WD-Disabled: flashing 2 Hz > > + > > +ETHx (Yellow/Green): > > +- Link: on > > +- Data transfer: flashing > > + > > +Module1 (Yellow/Green): > > +- Module-specific > > + > > +F1 (Yellow): > > +- Controlled via Software > > + > > +M.2 (Green): > > +- Module installed:on > > +- Data transfer: flashing > > ## Build the CIP Core image > > @@ -100,3 +169,63 @@ After boot, check the dmesg for Secure Boot > status like below: > > root@demo:~# dmesg | grep Secure > > [ 0.008368] Secure boot enabled > > ``` > > + > > +## Internal interfaces > > + > > +The M-COM contains an internal serial port that can be used to access > the devices kernel console for debug purposes. > > + > > +To access it, the backside of the device has to be unscrewed. > > +Afterwards it can be connected using a Mini-USB cable. > > +Make sure to have the appropriate FTDI driver installed. > > + > > +## Software Interfaces > > + > > +The following chapter describes interfaces accessible from software level. > > + > > +### Controlling the watchdogs > > + > > +The M-COM RT x86 contains two watchdogs: > > + > > +- Custom Hardware Watchdog > > +- UEFI watchdog of efibootguard > > + > > +The UEFI watchdog is controlled via efibootguard variables. > > +It can be configured for both partition sets using `bg_setenv -p > <partition number> -w <timeout in seconds>`. > > +To confirm the new watchdog configuration use `bg_setenv -c`. > > +To disable the watchdog set the timeout to 0. > > +The watchdog is fed via `/dev/wdog`. > > + > > +The custom watchdog is controlled via I2C. > > +The following scripts can be used to control it. > > + > > +Enable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x8000 > > +# mode = w > > + > > +# enable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x8000 w > > +``` > > + > > +Disable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x0000 > > +# mode = w > > + > > +# disable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x0000 w > > +``` > > \ No newline at end of file > > -- > > 2.45.2 > > > -- Siemens AG, Technology Linux Expert Center
Hi Benjamin, Sorry to bother you, any update on the below request? Thanks & Regards Shivanand K -----Original Message----- From: kunijadar shivanand(TSIP TMIEC ODG Porting) Sent: Tuesday, August 27, 2024 12:48 PM To: cip-dev@lists.cip-project.org; Schilling, Benjamin <schilling.benjamin@siemens.com> Cc: dinesh kumar(TSIP TMIEC ODG Porting) <dinesh.kumar@toshiba-tsip.com> Subject: RE: [cip-dev] [PATCH] README.m-com-x86.md: Add hardware details Hi Benjamin, Thank you for sending the patch file to include M-COM hardware specifications. Could you please resend this patch by fixing the issues pointed out by Jan? Thanks & Regards Shivanand K -----Original Message----- From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Jan Kiszka via lists.cip-project.org Sent: Monday, August 5, 2024 8:34 PM To: Schilling, Benjamin <schilling.benjamin@siemens.com>; cip-dev@lists.cip-project.org Subject: Re: [cip-dev] [PATCH] README.m-com-x86.md: Add hardware details On 29.07.24 11:09, Schilling, Benjamin wrote: > Hi all, > > what’s the status here? Anything I should change before it being merged? > Yeah, there were/are multiple issues: - missing [isar-cip-core] tag in subject made me miss this - you sent the patch as html - please don't, use git send-email or some suitable(!) email client (*) Jan (*) If you have Siemens-specific SMTP issues, drop me a note, there are solutions. > > > Best regards > > Benjamin > > > > *Von: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> > im Auftrag von Benjamin Schilling via lists.cip-project.org > <schilling.benjamin=siemens.com@lists.cip-project.org> > *Datum: *Montag, 8. Juli 2024 um 21:17 > *An: *cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> > *Betreff: *[cip-dev] [PATCH] README.m-com-x86.md: Add hardware details > > From 4e6b957569e0a4dd617cc1f4fd716c769681f6dc Mon Sep 17 00:00:00 2001 > > From: Benjamin Schilling <schilling.benjamin@siemens.com> > > Date: Mon, 8 Jul 2024 21:00:14 +0200 > > Subject: [PATCH] README.m-com-x86.md: Add hardware details > > > > Signed-off-by: Benjamin Schilling <schilling.benjamin@siemens.com> > > --- > > doc/boards/README.m-com-x86.md | 131 ++++++++++++++++++++++++++++++++- > > 1 file changed, 130 insertions(+), 1 deletion(-) > > > > diff --git a/doc/boards/README.m-com-x86.md > b/doc/boards/README.m-com-x86.md > > index cbd74ad..d677b76 100644 > > --- a/doc/boards/README.m-com-x86.md > > +++ b/doc/boards/README.m-com-x86.md > > @@ -1,4 +1,73 @@ > > -# ISAR CIP Core: Instructions for M-COM RT X86 V1 > > +ISAR CIP Core: Instructions for the Siemens Mobility GmbH M-COM RT > +X86 V1 > > + > > +## About the M-COM RT X86 V1 > > + > > +The M-COM RT X86 V1 is an industrial grade PC. > > +It is designed to be installed on-board of trains and can be used for > communication and processing purposes or as a security gateway. > > + > > +## Hardware Specifications > > + > > +- Intel Atom E3950 CPU > > +- 8GB DDR3 DRAM soldered, ECC > > +- Trusted Platform Module V2.0 > > +- 3 Gigabit Ethernet ports (M12 X-coded) > > +- 1 USB 3.0 on front > > +- -40°C to +70°C, fanless > > +- EN 50155 compliant (railways) > > +- 16 GB eMMC storage > > +- Input voltage range: 24 - 110 V DC EN50155 > > + > > +### Power Plug Pinout > > + > > +M12 B-coded Plug > > + > > +| Column 1 | Column 2 | > > +| -------- | --------------------------- | > > +| 24-110V | Edge triggered power on | > > +| GND | Not connected | > > + > > +#### Powering the device > > + > > +The device must be connected to a powersupply providing 24V to 110V > output voltage at the "+" and "-" pins. > > +The "switch" pin is used for edge triggered power on. > > +It can be hardwired to the power supply 24V to 110V to trigger power > +on > of the device. > > + > > +### LED Matrix: > > + > > +| Column 1 | Column 2 | Column 3 | Column 4 | > > +| -------------- | -------------- | -------------- | ------------- | > > +| Power STBY | Power ON | WD-Trigger | Error 1 | > > +| ETH0 Link/Data | ETH1 Link/Data | ETH2 Link/Data | RS232/RS422 | > > +| Module1 | Module1 | F1 | M.2 Used/Data | > > + > > +Power STBY (Yellow): > > +- Standby: on > > +- Powering down: flashing > > + > > +Power ON (Green): > > +- Operation: on > > +- Powering up: flashing > > + > > +WD-Trigger (Yellow): > > +- Trigger pulses: flashing per pulse > > + > > +Error 1 (Red): > > +- WD-Permanent-Reset: flashing 4 Hz > > +- WD-Disabled: flashing 2 Hz > > + > > +ETHx (Yellow/Green): > > +- Link: on > > +- Data transfer: flashing > > + > > +Module1 (Yellow/Green): > > +- Module-specific > > + > > +F1 (Yellow): > > +- Controlled via Software > > + > > +M.2 (Green): > > +- Module installed:on > > +- Data transfer: flashing > > ## Build the CIP Core image > > @@ -100,3 +169,63 @@ After boot, check the dmesg for Secure Boot > status like below: > > root@demo:~# dmesg | grep Secure > > [ 0.008368] Secure boot enabled > > ``` > > + > > +## Internal interfaces > > + > > +The M-COM contains an internal serial port that can be used to access > the devices kernel console for debug purposes. > > + > > +To access it, the backside of the device has to be unscrewed. > > +Afterwards it can be connected using a Mini-USB cable. > > +Make sure to have the appropriate FTDI driver installed. > > + > > +## Software Interfaces > > + > > +The following chapter describes interfaces accessible from software level. > > + > > +### Controlling the watchdogs > > + > > +The M-COM RT x86 contains two watchdogs: > > + > > +- Custom Hardware Watchdog > > +- UEFI watchdog of efibootguard > > + > > +The UEFI watchdog is controlled via efibootguard variables. > > +It can be configured for both partition sets using `bg_setenv -p > <partition number> -w <timeout in seconds>`. > > +To confirm the new watchdog configuration use `bg_setenv -c`. > > +To disable the watchdog set the timeout to 0. > > +The watchdog is fed via `/dev/wdog`. > > + > > +The custom watchdog is controlled via I2C. > > +The following scripts can be used to control it. > > + > > +Enable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x8000 > > +# mode = w > > + > > +# enable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x8000 w > > +``` > > + > > +Disable watchdog: > > +```bash > > +#!/bin/bash > > + > > +# i2cset <i2cbus> <chip-address> <data-address> <value> <mode> > > + > > +# i2cbus = 2 > > +# chip-address = 0x3c > > +# data-address = 0x00 (Status Register) > > +# value = 0x0000 > > +# mode = w > > + > > +# disable watchdog > > +i2cset -y 2 -m 0x8000 0x3c 0x00 0x0000 w > > +``` > > \ No newline at end of file > > -- > > 2.45.2 > > > -- Siemens AG, Technology Linux Expert Center
diff --git a/doc/boards/README.m-com-x86.md b/doc/boards/README.m-com-x86.md index cbd74ad..d677b76 100644 --- a/doc/boards/README.m-com-x86.md +++ b/doc/boards/README.m-com-x86.md @@ -1,4 +1,73 @@ -# ISAR CIP Core: Instructions for M-COM RT X86 V1 +ISAR CIP Core: Instructions for the Siemens Mobility GmbH M-COM RT X86 V1 + +## About the M-COM RT X86 V1 + +The M-COM RT X86 V1 is an industrial grade PC. +It is designed to be installed on-board of trains and can be used for communication and processing purposes or as a security gateway. + +## Hardware Specifications + +- Intel Atom E3950 CPU +- 8GB DDR3 DRAM soldered, ECC +- Trusted Platform Module V2.0 +- 3 Gigabit Ethernet ports (M12 X-coded) +- 1 USB 3.0 on front +- -40°C to +70°C, fanless +- EN 50155 compliant (railways) +- 16 GB eMMC storage +- Input voltage range: 24 - 110 V DC EN50155 + +### Power Plug Pinout + +M12 B-coded Plug + +| Column 1 | Column 2 | +| -------- | --------------------------- | +| 24-110V | Edge triggered power on | +| GND | Not connected | + +#### Powering the device + +The device must be connected to a powersupply providing 24V to 110V output voltage at the "+" and "-" pins. +The "switch" pin is used for edge triggered power on. +It can be hardwired to the power supply 24V to 110V to trigger power on of the device. + +### LED Matrix: + +| Column 1 | Column 2 | Column 3 | Column 4 | +| -------------- | -------------- | -------------- | ------------- | +| Power STBY | Power ON | WD-Trigger | Error 1 | +| ETH0 Link/Data | ETH1 Link/Data | ETH2 Link/Data | RS232/RS422 | +| Module1 | Module1 | F1 | M.2 Used/Data | + +Power STBY (Yellow): +- Standby: on +- Powering down: flashing + +Power ON (Green): +- Operation: on +- Powering up: flashing + +WD-Trigger (Yellow): +- Trigger pulses: flashing per pulse + +Error 1 (Red): +- WD-Permanent-Reset: flashing 4 Hz +- WD-Disabled: flashing 2 Hz + +ETHx (Yellow/Green): +- Link: on +- Data transfer: flashing + +Module1 (Yellow/Green): +- Module-specific + +F1 (Yellow): +- Controlled via Software + +M.2 (Green): +- Module installed:on +- Data transfer: flashing ## Build the CIP Core image @@ -100,3 +169,63 @@ After boot, check the dmesg for Secure Boot status like below: root@demo:~# dmesg | grep Secure