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Wed, 13 Apr 2022 08:45:16 +0000 From: =?utf-8?b?SmltbXkgQ2hlbiAo6Zmz5rC46YGUKQ==?= To: "cip-dev@lists.cip-project.org" Subject: [PATCH linux-4.4.y-cip-rt 2/2] arm: dts: moxa: am335x-moxa-uc-8100-me: Add new MOXA model Thread-Topic: [PATCH linux-4.4.y-cip-rt 2/2] arm: dts: moxa: am335x-moxa-uc-8100-me: Add new MOXA model Thread-Index: AdhOPkIDIvoCY0fFT1ukqyuH2rZBhwA1FSSA Date: Wed, 13 Apr 2022 08:45:16 +0000 Message-ID: References: In-Reply-To: Accept-Language: zh-TW, en-US Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=moxa.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 300a21a6-efd2-4c84-3e3a-08da1d29ef2b x-ms-traffictypediagnostic: SG2PR01MB2330:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: gJ1LthFi9uaGIOJQD/Nb1mnWoAES3plKKscJ4pVdjTgClM5uAOCd7M0FbVoKX3tI82s9k7HSVMVpFYk0Cqx2F6zgFwclyauKvtx91KOkUE+un0wje/2li5PvG+OgZ2QaktPgSrhzzgzyBeN/k5+rzlN7Xj8h7DjAdnUH7fi9Y5mZQ99N9TK+dtIncMKyDvZLbFgUHgQ7MRtqm62h/85+eY6ukG2ofEWlSpKQoNKVHCCH1tsw+a9Jm2/AtmgEocqfP+4X/0Gb+YqkV+5mdN5nR+BSTEPu3yqxhDy/X5fY+MvpjIQBADp/Y/ACW9ygJWf5RXJVYm88yY/6DE1r6Osp7M71HstzG1f1MrsA+l381YG0ks5ZMKpJnw7CPQ082y7DUae5D6L33bQuKIdZHw3mU4MMBkYH7b2vkZUNCD6P9Eu03St6S8TSANciiRnNV93/DXAod0GNB3lqfwItwlEXC/iQ5O739fAMdtTW0Lf+/kMusnLU3xpRhU7gKe0gtGojokfs4lZUf4UYPe/U0WXoo8iuZtv59I2odur0TIzxf6ww2WuVOPz2V4b3nOk7Fu7jPCIVotNwd8PKyOhV1hevbgWTeqRhAaj4sSfo+GLwom0wKuEOlKfptHow+L7oHB7bM9cejtCGkQmBaVuWiPwhvzpALwf0bEpU124jtVQr8ba7ER9SnZFLsOwjAVPtEbVtPEk/QuyiZyg88hbjarJLbORocZOo6D5cHNo0HgvhvYMrdMD6ITijq5ezi8hsyVNkUPmrXhqqy4XqY2/oM2ny/0ZRbV+VcV+odn43XTMLPEs= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SEYPR01MB4272.apcprd01.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(8936002)(38100700002)(66476007)(52536014)(33656002)(55016003)(186003)(26005)(508600001)(6506007)(64756008)(316002)(9686003)(7696005)(71200400001)(83380400001)(2906002)(8676002)(38070700005)(86362001)(66556008)(66946007)(66446008)(30864003)(85182001)(966005)(6916009)(76116006)(5660300002)(122000001)(579004);DIR:OUT;SFP:1101; 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Wed, 13 Apr 2022 15:48:07 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/8071 Fixed Makefile file to support new MOXA model (none -t version). Signed-off-by: Jimmy Chen diff --git a/arch/arm/boot/dts/am335x-moxa-uc-8100-me.dts b/arch/arm/boot/dts/am335x-moxa-uc-8100-me.dts new file mode 100644 index 000000000000..f4df56341bcb --- /dev/null +++ b/arch/arm/boot/dts/am335x-moxa-uc-8100-me.dts @@ -0,0 +1,595 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 MOXA Inc. - https://www.moxa.com/ + * + * Authors: Wes Huang (暺殿瘝? + * Ken CJ Chou + */ + +/dts-v1/; + +#include "am33xx.dtsi" + +/ { + model = "Moxa UC-8100-ME"; + compatible = "ti,moxa-uc8100-me", "ti,am33xx"; + + cpus { + cpu@0 { + cpu0-supply = <&vdd1_reg>; + }; + }; + + cpu0_opp_table: opp_table0 { + + opp50@300000000 { + status = "okay"; + }; + + opp100@275000000 { + status = "disabled"; + }; + + opp100@300000000 { + status = "disabled"; + }; + + opp100@500000000 { + status = "disabled"; + }; + + opp100@600000000 { + status = "okay"; + }; + + opp120@600000000 { + status = "disabled"; + }; + + opp120@720000000 { + status = "okay"; + }; + + oppturbo@720000000 { + status = "disabled"; + }; + + oppturbo@800000000 { + status = "disabled"; + }; + + oppnitro@1000000000 { + status = "okay"; + }; + + }; + + aliases { + serial0 = &uart0; /* assign uart0 to /dev/ttyS0 */ + serial1 = &uart1; /* assign uart1 to /dev/ttyS1 */ + serial2 = &uart5; /* assign uart5 to /dev/ttyS2 */ + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + //regulator-boot-on; + }; + + /* Power supply provides a fixed 3.3V @3A */ + vmmcsd_fixed: fixedregulator@1 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + leds { + compatible = "gpio-leds"; + led@1 { + label = "UC8100ME:RED:CEL1"; + gpios = <&gpio_xten 8 0>; + default-state = "off"; + }; + + led@2 { + label = "UC8100ME:YELLOW:CEL2"; + gpios = <&gpio_xten 9 0>; + default-state = "off"; + }; + + led@3 { + label = "UC8100ME:GREEN:CEL3"; + gpios = <&gpio_xten 10 0>; + default-state = "off"; + }; + + led@4 { + label = "UC8100ME:RED:DIA1"; + gpios = <&gpio_xten 11 0>; + default-state = "off"; + }; + led@5 { + label = "UC8100ME:YELLOW:DIA2"; + gpios = <&gpio_xten 12 0>; + default-state = "off"; + }; + led@6 { + label = "UC8100ME:GREEN:DIA3"; + gpios = <&gpio_xten 13 0>; + default-state = "off"; + }; + led@7 { + label = "UC8100ME:GREEN:SD"; + gpios = <&gpio_xten 14 0>; + default-state = "off"; + }; + led@8 { + label = "UC8100ME:GREEN:USB"; + gpios = <&gpio_xten 15 0>; + default-state = "off"; + }; + led@9 { + label = "UC8100ME:GREEN:USER"; + gpios = <&gpio0 20 0>; + default-state = "off"; + }; + }; + + buttons: push_button { + compatible = "gpio-keys"; + }; + +}; + +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&minipcie_pins>; + + minipcie_pins: pinmux_minipcie { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8e8 ,PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2_24 */ + AM33XX_IOPAD(0x8ec ,PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */ + AM33XX_IOPAD(0x8e0 ,PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/ + >; + }; + + push_button_pins: pinmux_push_button { + pinctrl-single,pins = < + AM33XX_IOPAD(0x9ac ,PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x988 ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + AM33XX_IOPAD(0x98c ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x168 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ + 0x16c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x970 ,PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + AM33XX_IOPAD(0x974 ,PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x978 ,PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ + AM33XX_IOPAD(0x97C ,PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ + AM33XX_IOPAD(0x980 ,PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ + AM33XX_IOPAD(0x984 ,PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8d8 ,PIN_INPUT | MUX_MODE6) /* lcd_data14.uart5_ctsn */ + AM33XX_IOPAD(0x8dc ,PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data15.uart5_rtsn */ + AM33XX_IOPAD(0x8c4 ,PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9.uart5_rxd */ + AM33XX_IOPAD(0x8c0 ,PIN_OUTPUT | MUX_MODE4) /* lcd_data8.uart5_txd */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + AM33XX_IOPAD(0x90c ,PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ + AM33XX_IOPAD(0x910 ,PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ + AM33XX_IOPAD(0x914 ,PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ + AM33XX_IOPAD(0x924 ,PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ + AM33XX_IOPAD(0x928 ,PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ + AM33XX_IOPAD(0x93c ,PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ + AM33XX_IOPAD(0x940 ,PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ + AM33XX_IOPAD(0x944 ,PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */ + + /* Slave 2 */ + AM33XX_IOPAD(0x870 ,PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */ + AM33XX_IOPAD(0x874 ,PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */ + AM33XX_IOPAD(0x840 ,PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */ + AM33XX_IOPAD(0x850 ,PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */ + AM33XX_IOPAD(0x854 ,PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */ + AM33XX_IOPAD(0x868 ,PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */ + AM33XX_IOPAD(0x86c ,PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */ + AM33XX_IOPAD(0x908 ,PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */ + + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + AM33XX_IOPAD(0x948 ,PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + AM33XX_IOPAD(0x94c ,PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + mmc0_pins_default: pinmux_mmc0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8f0 ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */ + AM33XX_IOPAD(0x8f4 ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */ + AM33XX_IOPAD(0x8f8 ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */ + AM33XX_IOPAD(0x8fc ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */ + AM33XX_IOPAD(0x900 ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */ + AM33XX_IOPAD(0x904 ,PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */ + AM33XX_IOPAD(0x990 ,PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */ + AM33XX_IOPAD(0x9a0 ,PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */ + >; + }; + + + mmc2_pins_default: pinmux_mmc2_pins { + pinctrl-single,pins = < + /* eMMC */ + AM33XX_IOPAD(0x830 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ + AM33XX_IOPAD(0x834 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ + AM33XX_IOPAD(0x838 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ + AM33XX_IOPAD(0x83c ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ + AM33XX_IOPAD(0x820 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */ + AM33XX_IOPAD(0x824 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */ + AM33XX_IOPAD(0x828 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */ + AM33XX_IOPAD(0x82c ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */ + AM33XX_IOPAD(0x888 ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ + AM33XX_IOPAD(0x88c ,PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */ + >; + }; + + spi0_pins: pinmux_spi0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x950 ,PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */ + AM33XX_IOPAD(0x95C ,PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ + AM33XX_IOPAD(0x954 ,PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ + AM33XX_IOPAD(0x958 ,PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ + AM33XX_IOPAD(0x960 ,PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs1.spi0_cs1 */ + >; + }; + +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart1 { + /* UART 1 setting */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart5 { + /* UART 2 setting */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tpm: tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + }; + + tps: tps@2d { + compatible = "ti,tps65910"; + reg = <0x2d>; + }; + + eeprom: eeprom@50 { + compatible = "at,24c16"; + pagesize = <16>; + reg = <0x50>; + }; + + rtc_wdt: rtc_wdt@68 { + compatible = "dallas,ds1374"; + reg = <0x68>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + status = "okay"; + clock-frequency = <400000>; + gpio_xten: gpio_xten@27 { + compatible = "nxp,pca9535"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x27>; + }; +}; + +&usb { + status = "okay"; +}; + +&usb_ctrl_mod { + status = "okay"; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + + +&usb1 { + status = "okay"; + dr_mode = "host"; +}; + +&cppi41dma { + status = "okay"; +}; + + +#include "tps65910.dtsi" + +&tps { + vcc1-supply = <&vbat>; + vcc2-supply = <&vbat>; + vcc3-supply = <&vbat>; + vcc4-supply = <&vbat>; + vcc5-supply = <&vbat>; + vcc6-supply = <&vbat>; + vcc7-supply = <&vbat>; + vccio-supply = <&vbat>; + + regulators { + vrtc_reg: regulator@0 { + regulator-always-on; + }; + + vio_reg: regulator@1 { + regulator-always-on; + }; + + vdd1_reg: regulator@2 { + /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd2_reg: regulator@3 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd3_reg: regulator@4 { + regulator-always-on; + }; + + vdig1_reg: regulator@5 { + regulator-always-on; + }; + + vdig2_reg: regulator@6 { + regulator-always-on; + }; + + vpll_reg: regulator@7 { + regulator-always-on; + }; + + vdac_reg: regulator@8 { + regulator-always-on; + }; + + vaux1_reg: regulator@9 { + regulator-always-on; + }; + + vaux2_reg: regulator@10 { + regulator-always-on; + }; + + vaux33_reg: regulator@11 { + regulator-always-on; + }; + + vmmc_reg: regulator@12 { + compatible = "regulator-fixed"; + regulator-name = "vmmc_reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; + +/* Power */ +&vbat { + regulator-name = "vbat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +}; + +&mac { + pinctrl-names = "default"; + pinctrl-0 = <&cpsw_default>; + dual_emac = <1>; + status = "okay"; +}; + +&davinci_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&davinci_mdio_default>; + status = "okay"; +}; + +&cpsw_emac0 { + status = "okay"; + phy_id = <&davinci_mdio>, <4>; + phy-mode = "rmii"; + dual_emac_res_vlan = <1>; +}; + +&cpsw_emac1 { + status = "okay"; + phy_id = <&davinci_mdio>, <5>; + phy-mode = "rmii"; + dual_emac_res_vlan = <2>; +}; + +&phy_sel { + reg= <0x44e10650 0xf5>; + rmii-clock-ext; +}; + +&sham { + status = "okay"; +}; + +&aes { + status = "okay"; +}; + +&gpio0 { + ti,no-reset-on-init; +}; + +&mmc1 { + pinctrl-names = "default"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <4>; + pinctrl-0 = <&mmc0_pins_default>; + cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&mmc3 { + /* these are on the crossbar and are outlined in the + xbar-event-map element */ + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <8>; + pinctrl-0 = <&mmc2_pins_default>; + ti,non-removable; + status = "okay"; +}; + +&buttons { + pinctrl-names = "default"; + pinctrl-0 = <&push_button_pins>; + #address-cells = <1>; + #size-cells = <0>; + + button@0 { + label = "push_button"; + linux,code = <0x100>; + gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; + }; +}; + +/* SPI Busses */ +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + + m25p80@0 { + compatible = "mx25l6405d"; + spi-max-frequency = <40000000>; + + reg = <0>; + spi-cpol; + spi-cpha; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* reg : The partition's offset and size within the mtd bank. */ + partitions@0 { + label = "MLO"; + reg = <0x0 0x80000>; + }; + + partitions@1 { + label = "U-Boot"; + reg = <0x80000 0x100000>; + }; + + partitions@2 { + label = "U-Boot Env"; + reg = <0x180000 0x20000>; + }; + }; + + + }; + + tpm_spi_tis@1{ + compatible = "tcg,tpm_tis-spi"; + reg = <1>; /* CE1 */ + spi-max-frequency = <500000>; + }; +}; + +&wdt2 { + status = "disabled"; +};