| Message ID | 164730733718.3806189.9721916820488234094.stgit@dwillia2-desk3.amr.corp.intel.com |
|---|---|
| Headers | show |
| Series | cxl: Handle DVSEC range init failures | expand |
On Mon, 14 Mar 2022, Dan Williams wrote: >Dan Williams (6): > cxl/mem: Drop DVSEC vs EFI Memory Map sanity check > cxl/pci: Add debug for DVSEC range init failures > cxl/mem: Make cxl_dvsec_range() init failure fatal > cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pci > cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init() > cxl/mem: Replace redundant debug message with a comment I have gone through the remaining patches and they look good to me. Feel free to add my: Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> > > > drivers/cxl/mem.c | 52 +++++++++++++++--------------------------- > drivers/cxl/pci.c | 40 +++++++++++++++++++++++--------- > tools/testing/cxl/mock_mem.c | 2 +- > 3 files changed, 48 insertions(+), 46 deletions(-) > >base-commit: 74be98774dfbc5b8b795db726bd772e735d2edd4
Changes since v1 [1]: - Split the debug message additions to their own patch (Ben) - Split the cxl_dvsec_range() handling in the cxl_mem driver to its own patch. - Add a patch to rename cxl_dvsec_decode_init() - Add a patch to clarify global HDM decoder control vs DVSEC range configuration. - Pick up David's Reviewed-by, thanks David! [1]: https://lore.kernel.org/r/164690155138.3326488.16049914482944930295.stgit@dwillia2-desk3.amr.corp.intel.com --- Krzysztof reports a case where a timeout waiting for the "memory info valid" indication in the DVSEC range register also results in the PCI driver failing to load. Fix that scenario by making DVSEC range register probe failures non-fatal to the cxl_pci driver. Instead, convey the state of the DVSEC range registers to the cxl_mem driver which can decide if it wants to proceed. Recall that the reason cxl_mem relies on cxl_pci to do the register access is to keep PCI configuration space knowledge in the cxl_pci driver and leave MMIO based CXL.mem operations to the cxl_mem driver. While pulling on the above threads a few more fixup and clarification opportunities fell out. --- Dan Williams (6): cxl/mem: Drop DVSEC vs EFI Memory Map sanity check cxl/pci: Add debug for DVSEC range init failures cxl/mem: Make cxl_dvsec_range() init failure fatal cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pci cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init() cxl/mem: Replace redundant debug message with a comment drivers/cxl/mem.c | 52 +++++++++++++++--------------------------- drivers/cxl/pci.c | 40 +++++++++++++++++++++++--------- tools/testing/cxl/mock_mem.c | 2 +- 3 files changed, 48 insertions(+), 46 deletions(-) base-commit: 74be98774dfbc5b8b795db726bd772e735d2edd4