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[0/4] cxl/region: Endpoint decoder fixes

Message ID 165951145706.967013.3023584411011908037.stgit@dwillia2-xfh.jf.intel.com
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Series cxl/region: Endpoint decoder fixes | expand

Message

Dan Williams Aug. 3, 2022, 7:24 a.m. UTC
It turns out that the driver was only programming "mid-level" decoders
and not endpoint decoders. This was missed because the default settings
still allowed traffic to flow, just not to the expected DPA, and not
without aliasing.

The following fixes address that problem, but this still wants a test
environment that validates the expected DPA relative to a given HPA.
Jonathan caught this bug while trying to develop such an environment for
QEMU, but this likely also wants a cxl_test scheme to do the same. In
the meantime here is the fixup to program interleave ways + granularity
and some miscellaneous fixups for build robot reports.

These apply against current cxl/pending.

---

Dan Williams (4):
      cxl/region: Fix decoder interleave programming
      cxl/region: Move HPA setup to cxl_region_attach()
      cxl/region: Fix port setup uninitialized variable warnings
      cxl/region: Fix region commit uninitialized variable warning


 drivers/cxl/core/hdm.c    |   17 ++---------------
 drivers/cxl/core/region.c |   36 +++++++++++++++++++++++++++---------
 2 files changed, 29 insertions(+), 24 deletions(-)

base-commit: 65fc1c3d26b96002a5aa1f4012fae4dc98fd5683