| Message ID | 20211027224043.3551125-1-ira.weiny@intel.com |
|---|---|
| Headers | show |
| Series | CDAT/DSMAS reading and cleanups | expand |
On Wed, Oct 27, 2021 at 03:40:34PM -0700, 'Ira Weiny' wrote: > From: Ira Weiny <ira.weiny@intel.com> > > This really should be 2 series and a single patch for the cxl_mem change. > > But for internal review I'm just going to throw it out on email to see what > others think. Sorry for the noise. Somehow the public email got in my to list. These should be coming out soon. But there are still a couple of questions and the series should be 3 sets not 1. Ira
From: Ira Weiny <ira.weiny@intel.com> This really should be 2 series and a single patch for the cxl_mem change. But for internal review I'm just going to throw it out on email to see what others think. Here are the 3 cover letters. <Documentation> The auxiliary device documentation was not wrong but it was a bit difficult to follow. Add clarifications to ensure that details are not missed. </Documentation> <CDAT/DSMAS> Read CDAT and DSMAS data from the device. This work was built on Jonathan's V4 series here[1]. The big change is a conversion to an Auxiliary bus infrastructure which allows the DOE code to be in a separate driver object which is attached to any DOE devices which are created by the CXL device. Other devices can then create DOE devices and have the doe driver automatically attach to this functionality. Furthermore, user space control of DOE mailboxes will be easier because of the separation from the parent device control. [1] https://lore.kernel.org/linux-cxl/20210524133938.2815206-1-Jonathan.Cameron@huawei.com </CDAT/DSMAS> <Single patch so no cover for the cxlmem change.> Ira Weiny (5): Documentation/auxiliary_bus: Clarify auxiliary_device creation Documentation/auxiliary_bus: Clarify match_name Documentation/auxiliary_bus: Update Auxiliary device lifespan cxl/cdat: Parse out DSMASS data from CDAT table cxl/cxlmem: Change struct cxl_mem to a more descriptive name Jonathan Cameron (4): PCI: Add vendor ID for the PCI SIG PCI/DOE: Add Data Object Exchange Aux Driver cxl/pci: Add DOE Auxiliary Devices cxl/mem: Add CDAT table reading from DOE Documentation/driver-api/auxiliary_bus.rst | 137 +++- drivers/cxl/Kconfig | 1 + drivers/cxl/cdat.h | 81 +++ drivers/cxl/core/mbox.c | 160 ++--- drivers/cxl/core/memdev.c | 205 +++++- drivers/cxl/cxl.h | 20 + drivers/cxl/cxlmem.h | 79 ++- drivers/cxl/pci.c | 355 ++++++++--- drivers/cxl/pmem.c | 32 +- drivers/pci/Kconfig | 11 + drivers/pci/Makefile | 3 + drivers/pci/doe.c | 704 +++++++++++++++++++++ include/linux/pci-doe.h | 63 ++ include/linux/pci_ids.h | 1 + include/uapi/linux/pci_regs.h | 29 +- tools/testing/cxl/test/mem.c | 50 +- 16 files changed, 1670 insertions(+), 261 deletions(-) create mode 100644 drivers/cxl/cdat.h create mode 100644 drivers/pci/doe.c create mode 100644 include/linux/pci-doe.h