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[v2,0/2] acpi: add support for CXL _OSC

Message ID 20220326002430.797244-1-vishal.l.verma@intel.com
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Series acpi: add support for CXL _OSC | expand

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Verma, Vishal L March 26, 2022, 12:24 a.m. UTC 
Changes since v1[1]:
- Reword commit message (Dan)
- Move the OSC capability size definition and usage into patch 1 (Davidlohr)
- Clean up some unnecessary parens (Rafael)
- Avoid repetitive strcmp()'s in is_pcie()/is_cxl() helpers (Rafael)
- Clean up some pointer math (Rafael)
- Fix a copy-paste error in updating the saved OSC mask (Rafael)
- Fix a bug where we'd try to print missing OSC bits when we should've
  been printing missing PCI bits.

Add support for using the CXL definition of _OSC where applicable, and
negotiating CXL specific support and control bits.

Patch 1 adds the new CXL _OSC UUID, and uses it instead of the PCI UUID
when a root port is CXL enabled. It provides a fallback method for
CXL-1.1 platforms that may not implement the CXL-2.0 _OSC.

Patch 2 performs negotiation for the CXL specific _OSC support and
control bits.

I've tested these against a custom qemu[2], which adds the CXL _OSC (in
addition to other CXL support). Specifically, _OSC support is added
here[3].

[1]: https://lore.kernel.org/all/20220318213004.2287428-1-vishal.l.verma@intel.com/
[2]: https://gitlab.com/jic23/qemu/-/tree/cxl-v8-draft
[3]: https://gitlab.com/jic23/qemu/-/commit/1d67df6b6e3716c27462873f3451956f5c0673a3

Dan Williams (1):
  PCI/ACPI: Use CXL _OSC instead of PCIe _OSC

Vishal Verma (1):
  acpi/pci_root: negotiate CXL _OSC

 include/linux/acpi.h    |  20 +++-
 include/acpi/acpi_bus.h |  12 ++-
 drivers/acpi/pci_root.c | 225 ++++++++++++++++++++++++++++++++++------
 3 files changed, 224 insertions(+), 33 deletions(-)


base-commit: 05e815539f3f161585c13a9ab023341bade2c52f