Message ID | 20220406023746.2807328-1-vishal.l.verma@intel.com |
---|---|
Headers | show |
Series | PCI/ACPI: add support for CXL _OSC | expand |
On Tue, 05 Apr 2022, Vishal Verma wrote: >Changes since v4[1]: >- Collect an ack for patch 1 (Rafael) >- Fix commit subject wording in patch 2 (Rafael) >- Fix a debug print in patch 2 (Rafael) >- Document the reasoning behind calculation of cxl hotplug support (David) >- A few definition and variable name changes to make the new _OSC DWORDS > generic instead of CXL specific (Rafael) > >Add support for using the CXL definition of _OSC where applicable, and >negotiating CXL specific support and control bits. > >Patch 1 is a preliminary cleanup that replaces open-coded pointer >arithmetic to retrieve the Control DWORD with an inline helper. > >Patch 2 adds the new CXL _OSC UUID, and uses it instead of the PCI UUID >when a root port is CXL enabled. It provides a fallback method for >CXL-1.1 platforms that may not implement the CXL-2.0 _OSC. > >Patch 3 performs negotiation for the CXL specific _OSC support and >control bits. > >I've tested these against a custom qemu[2], which adds the CXL _OSC (in >addition to other CXL support). Specifically, _OSC support is added >here[3]. For the series, feel free to add my: Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>