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[0/3] QEMU/CXL: A few more fixes for 7.1 related to LSA

Message ID 20220817145759.32603-1-Jonathan.Cameron@huawei.com
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Series QEMU/CXL: A few more fixes for 7.1 related to LSA | expand

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Jonathan Cameron Aug. 17, 2022, 2:57 p.m. UTC
The recent addition of CXL Region setup to the 6.0-rc1 Linux kernel
has allowed us to test a few paths that weren't exercised fully until
now.  That threw up a mixture of bugs in QEMU emulation and the kernel
(kernel fixes already posted).

The first patch is down to a wrong assumption about RO MemoryRegions
and was hit due to a kernel bug overruning the mailbox and into
another register region.  Kernel bug fix:

https://lore.kernel.org/linux-cxl/20220815154044.24733-1-Jonathan.Cameron@huawei.com

The later 2 have shown up because the Get / Set LSA commands
have started getting proper user in the kernel.

With these fixes in place I've tested an 8 way interleave on a host
bridge to directly connected CXL devices and zeroed LSA regions.
On that we can bring up a CXL region on which we can create an
fsdax namespace and make a filesystem. For now, the cookie used
to identify device for re establishing that region/namespace will
be 0. A new feature patch will follow that will add the ability
to provide the necessary serial numbers for correct namespace
cookie creation allowing the namespace/filesystem to be remounted
after a full restart.

Jonathan Cameron (3):
  hw/cxl: Add stub write function for RO MemoryRegionOps entries.
  hw/cxl: Fix Get LSA input payload size which should be 8 bytes.
  hw/cxl: Correctly handle variable sized mailbox input payloads.

 hw/cxl/cxl-device-utils.c  | 12 +++++++++---
 hw/cxl/cxl-mailbox-utils.c |  4 ++--
 2 files changed, 11 insertions(+), 5 deletions(-)