From patchwork Mon Sep 26 21:57:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 12989473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2CDAC32771 for ; Mon, 26 Sep 2022 21:57:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230342AbiIZV5X (ORCPT ); Mon, 26 Sep 2022 17:57:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229844AbiIZV5V (ORCPT ); Mon, 26 Sep 2022 17:57:21 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABC85D4327; Mon, 26 Sep 2022 14:57:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664229440; x=1695765440; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=zVMWunYPM2+IIkAGb+SLwB9+KCfT1/0NI6xHqBaLML8=; b=N2xvYHCnYqxeIv2I0kDIj3t6MHcbCy8AldWsG9zdJjA/el2B4y//YIrz IJ8J0BeJkvMzAmXwqko8MR1ythV7KlMl9mzGeFFwwUaR/Dt/a+cDaXysG YEyPGxcUAI8fMnae889ftOx+20qaHYt9v/d7UpBQPx5ycDI7TpGxc9zEj yossYGVCZp6cBofU4RkDfuMo6NOsd8vhYz1sicSzMvGRnJd9t2I3X18z7 79vZ6N8fcnoYnoQtwlwXMsCDxV87vPNz02F9QZx+gQm2lry95bXFvgSnj E7IjxBHSYLotDuEdk6YA2dL22f6a7WnDksDHppPUcynqSEqbH/3nzkPYY A==; X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="302057556" X-IronPort-AV: E=Sophos;i="5.93,347,1654585200"; d="scan'208";a="302057556" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Sep 2022 14:57:20 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="598911424" X-IronPort-AV: E=Sophos;i="5.93,347,1654585200"; d="scan'208";a="598911424" Received: from iweiny-desk3.amr.corp.intel.com (HELO localhost) ([10.209.75.159]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Sep 2022 14:57:19 -0700 From: ira.weiny@intel.com To: Dan Williams Cc: Ira Weiny , Alison Schofield , Vishal Verma , Ben Widawsky , linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH V3 0/2] CXL: Taint user access to DOE mailbox config space Date: Mon, 26 Sep 2022 14:57:09 -0700 Message-Id: <20220926215711.2893286-1-ira.weiny@intel.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Ira Weiny Changes from V2 Incorporate feedback from Greg and Jonathan Changes from V1 Incorporate feedback from Dan and Greg. PCI config space access from user space has traditionally been unrestricted with writes being an understood risk for device operation. Unfortunately, device breakage or odd behavior from config writes lacks indicators that can leave driver writers confused when evaluating failures. This is especially true with the new PCIe Data Object Exchange (DOE) mailbox protocol where backdoor shenanigans from user space through things such as vendor defined protocols may affect device operation without complete breakage. Even though access should not be restricted it would be nice for driver writers to be able to flag critical parts of the config space such that interference from user space can be detected. Introduce pci_request_config_region_exclusive() and use it in the CXL driver for DOE config space. Ira Weiny (2): PCI: Allow drivers to request exclusive config regions cxl/doe: Request exclusive DOE access drivers/cxl/pci.c | 5 +++++ drivers/pci/pci-sysfs.c | 7 +++++++ drivers/pci/probe.c | 6 ++++++ include/linux/ioport.h | 2 ++ include/linux/pci.h | 17 +++++++++++++++++ include/uapi/linux/pci_regs.h | 1 + kernel/resource.c | 13 ++++++++----- 7 files changed, 46 insertions(+), 5 deletions(-) base-commit: f76349cf41451c5c42a99f18a9163377e4b364ff