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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id v196-20020a25c5cd000000b00c62e0df7ca8sm863822ybe.24.2023.07.21.09.36.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jul 2023 09:36:09 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH 0/4] CXL: SK hynix Niagara MHSLD Device Date: Fri, 21 Jul 2023 12:35:02 -0400 Message-Id: <20230721163505.1910-1-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Base repo: https://gitlab.com/jic23/qemu Base branch: cxl-2023-07-17 This patch set includes an emulation of the SK hynix Niagara MHSLD platform with custom CCI commands that allow for isolation of memory blocks between attached hosts. There are 4 total patches in this set: 1 & 2: Modifications to the CCI interface to allow the addition of custom CCI commands to an existing CCI command set. 3: Minimum MHD cci support for a type-3 device 4: The SK hynix Niagara Device The changes to the core device and cci interface are very limited, and this provides a clean way for developers to add custom CCI commands to a device while retaining the possiblity to upstream the model. This device allows hosts to request memory blocks directly from the device, rather than requiring full the DCD command set. As a matter of simplicity, this is beneficial to for testing and applications of dynamic memory pooling on top of the 1.1 and 2.0 specification. Note that these CCI commands are not servicable without the kernel allowing raw CXL commands to be passed through the mailbox driver, so users should enable `CONFIG_CXL_MEM_RAW_COMMANDS=y` on the kernel of their QEMU instance. Signed-off-by: Gregory Price Gregory Price (4): cxl/mailbox: change CCI cmd set structure to be a member, not a refernce cxl/mailbox: interface to add CCI commands to an existing CCI cxl/type3: minimum MHD cci support cxl/vendor: SK hynix Niagara Multi-Headed SLD Device hw/cxl/Kconfig | 4 + hw/cxl/cxl-mailbox-utils.c | 90 +++- hw/cxl/meson.build | 2 + hw/cxl/vendor/meson.build | 1 + hw/cxl/vendor/skhynix/.gitignore | 1 + hw/cxl/vendor/skhynix/init_niagara.c | 99 +++++ hw/cxl/vendor/skhynix/meson.build | 1 + hw/cxl/vendor/skhynix/skhynix_niagara.c | 521 ++++++++++++++++++++++++ hw/mem/cxl_type3.c | 67 +++ include/hw/cxl/cxl_device.h | 18 +- tools/cxl/cxl_mhd_init.c | 63 +++ tools/cxl/meson.build | 3 + tools/meson.build | 1 + 13 files changed, 866 insertions(+), 5 deletions(-) create mode 100644 hw/cxl/vendor/meson.build create mode 100644 hw/cxl/vendor/skhynix/.gitignore create mode 100644 hw/cxl/vendor/skhynix/init_niagara.c create mode 100644 hw/cxl/vendor/skhynix/meson.build create mode 100644 hw/cxl/vendor/skhynix/skhynix_niagara.c create mode 100644 tools/cxl/cxl_mhd_init.c create mode 100644 tools/cxl/meson.build