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Mon, 25 Sep 2023 20:01:54 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002636E.mail.protection.outlook.com (10.167.241.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6838.14 via Frontend Transport; Mon, 25 Sep 2023 20:01:54 +0000 Received: from bcheatha-HP-EliteBook-845-G8-Notebook-PC.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 25 Sep 2023 15:01:50 -0500 From: Ben Cheatham To: , , , CC: , , Subject: [PATCH v5 0/3] CXL, ACPI, APEI, EINJ: Update EINJ for CXL 1.1 error types Date: Mon, 25 Sep 2023 15:01:24 -0500 Message-ID: <20230925200127.504256-1-Benjamin.Cheatham@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636E:EE_|DM4PR12MB6230:EE_ X-MS-Office365-Filtering-Correlation-Id: abc8f6b5-b4ef-425b-7371-08dbbe024438 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Sep 2023 20:01:54.6194 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: abc8f6b5-b4ef-425b-7371-08dbbe024438 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6230 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org v5 Changes: - Removed device_add_file() in favor of using sysfs_create_group() and an is_visible() callback - Add setting cxl_root to NULL on cxl_acpi driver exit - Add real path for cxl_rcrb_addr file to documentation in addition to symlink path This patch is a follow up to the discussion at [1], and builds on Tony's CXL error patch at [2]. The new CXL error types will use the Memory Address field in the SET_ERROR_TYPE_WITH_ADDRESS structure in order to target a CXL 1.1 compliant memory-mapped downstream port. The value of the memory address will be in the port's MMIO range, and it will not represent physical (normal or persistent) memory. In v2 [3], the user supplied the MMIO address for the downstream port, but per Dan Williams' suggestion [3], the addresses are predetermined and the user only picks the error type to inject and the downstream port to inject into. In order to inject an error, the user write the error type to the error_type file under the einj debugfs directory, then writes any integer into one of the files under the cxl directory. [1]: Link: https://lore.kernel.org/linux-acpi/20221206205234.606073-1-Benjamin.Cheatham@amd.com/ [2]: Link: https://lore.kernel.org/linux-cxl/CAJZ5v0hNQUfWViqxbJ5B4JCGJUuHpWWSpqpCFWPNpGuagoFbsQ@mail.gmail.com/T/#t [3]: Link: https://lore.kernel.org/linux-cxl/20230403151849.43408-1-Benjamin.Cheatham@amd.com/ Ben Cheatham (3): CXL, PCIE: Add cxl_rcrb_addr file to dport_dev ACPI, APEI, EINJ: Add CXL 1.1 EINJ error type support ACPI, APEI, EINJ: Update EINJ documentation Documentation/ABI/testing/sysfs-bus-cxl | 9 +++ .../firmware-guide/acpi/apei/einj.rst | 25 ++++++- drivers/acpi/apei/Kconfig | 2 + drivers/acpi/apei/einj.c | 24 +++++- drivers/cxl/acpi.c | 3 + drivers/cxl/core/port.c | 75 +++++++++++++++++++ drivers/cxl/cxl.h | 3 + include/linux/cxl.h | 11 +++ 8 files changed, 147 insertions(+), 5 deletions(-) create mode 100644 include/linux/cxl.h