mbox series

[v3,0/4] Fixes for hdm docoder initialization from DVSEC ranges

Message ID 20240813110532.870869-1-yanfei.xu@intel.com
Headers show
Series Fixes for hdm docoder initialization from DVSEC ranges | expand

Message

Yanfei Xu Aug. 13, 2024, 11:05 a.m. UTC
The first and third patch are intended to fix potential issues regarding to
retrieve and record DVSEC ranges. The second and fourth are cleanup.

v2->v3:
- improved the commit message of patch1 to indicate potential impact of
  the change.  (Dan)
- Dropped un-appropriate "Fixes" tag. (Dan)
- Dropped the patch2 which is a code movement in original patchset.
- Separated the original patch3 into cleanup one and logic change one which
  are corresponding to patch2 and patch3 in current patchset. (Dan)

v2:https://lore.kernel.org/linux-cxl/20240809093442.646545-1-yanfei.xu@intel.com/T/#t

Yanfei Xu (4):
  cxl/pci: Fix to record only non-zero ranges
  cxl/pci: Remove duplicated implementation of waiting for
    memory_info_valid
  cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
  cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()

 drivers/cxl/core/pci.c        | 74 +++++++++--------------------------
 drivers/cxl/cxl.h             |  2 +-
 drivers/cxl/port.c            |  2 +-
 tools/testing/cxl/test/mock.c |  4 +-
 4 files changed, 23 insertions(+), 59 deletions(-)

Comments

Yanfei Xu Aug. 27, 2024, 5:04 a.m. UTC | #1
gentle ping

On 8/13/2024 7:05 PM, Yanfei Xu wrote:
> The first and third patch are intended to fix potential issues regarding to
> retrieve and record DVSEC ranges. The second and fourth are cleanup.
> 
> v2->v3:
> - improved the commit message of patch1 to indicate potential impact of
>    the change.  (Dan)
> - Dropped un-appropriate "Fixes" tag. (Dan)
> - Dropped the patch2 which is a code movement in original patchset.
> - Separated the original patch3 into cleanup one and logic change one which
>    are corresponding to patch2 and patch3 in current patchset. (Dan)
> 
> v2:https://lore.kernel.org/linux-cxl/20240809093442.646545-1-yanfei.xu@intel.com/T/#t
> 
> Yanfei Xu (4):
>    cxl/pci: Fix to record only non-zero ranges
>    cxl/pci: Remove duplicated implementation of waiting for
>      memory_info_valid
>    cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
>    cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()
> 
>   drivers/cxl/core/pci.c        | 74 +++++++++--------------------------
>   drivers/cxl/cxl.h             |  2 +-
>   drivers/cxl/port.c            |  2 +-
>   tools/testing/cxl/test/mock.c |  4 +-
>   4 files changed, 23 insertions(+), 59 deletions(-)
>
Jonathan Cameron Aug. 27, 2024, 4:08 p.m. UTC | #2
On Tue, 13 Aug 2024 19:05:28 +0800
Yanfei Xu <yanfei.xu@intel.com> wrote:

> The first and third patch are intended to fix potential issues regarding to
> retrieve and record DVSEC ranges. The second and fourth are cleanup.

typo in patch title.  decoder


Also, good to include cxl: as prefix to the patch title.

> 
> v2->v3:
> - improved the commit message of patch1 to indicate potential impact of
>   the change.  (Dan)
> - Dropped un-appropriate "Fixes" tag. (Dan)
> - Dropped the patch2 which is a code movement in original patchset.
> - Separated the original patch3 into cleanup one and logic change one which
>   are corresponding to patch2 and patch3 in current patchset. (Dan)
> 
> v2:https://lore.kernel.org/linux-cxl/20240809093442.646545-1-yanfei.xu@intel.com/T/#t
> 
> Yanfei Xu (4):
>   cxl/pci: Fix to record only non-zero ranges
>   cxl/pci: Remove duplicated implementation of waiting for
>     memory_info_valid
>   cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
>   cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()
> 
>  drivers/cxl/core/pci.c        | 74 +++++++++--------------------------
>  drivers/cxl/cxl.h             |  2 +-
>  drivers/cxl/port.c            |  2 +-
>  tools/testing/cxl/test/mock.c |  4 +-
>  4 files changed, 23 insertions(+), 59 deletions(-)
>
Yanfei Xu Aug. 28, 2024, 2:45 a.m. UTC | #3
On 8/28/2024 12:08 AM, Jonathan Cameron wrote:
> On Tue, 13 Aug 2024 19:05:28 +0800
> Yanfei Xu <yanfei.xu@intel.com> wrote:
> 
>> The first and third patch are intended to fix potential issues regarding to
>> retrieve and record DVSEC ranges. The second and fourth are cleanup.
> 
> typo in patch title.  decoder
> 
> 
> Also, good to include cxl: as prefix to the patch title.
> 

Got it, will do.

>>
>> v2->v3:
>> - improved the commit message of patch1 to indicate potential impact of
>>    the change.  (Dan)
>> - Dropped un-appropriate "Fixes" tag. (Dan)
>> - Dropped the patch2 which is a code movement in original patchset.
>> - Separated the original patch3 into cleanup one and logic change one which
>>    are corresponding to patch2 and patch3 in current patchset. (Dan)
>>
>> v2:https://lore.kernel.org/linux-cxl/20240809093442.646545-1-yanfei.xu@intel.com/T/#t
>>
>> Yanfei Xu (4):
>>    cxl/pci: Fix to record only non-zero ranges
>>    cxl/pci: Remove duplicated implementation of waiting for
>>      memory_info_valid
>>    cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
>>    cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()
>>
>>   drivers/cxl/core/pci.c        | 74 +++++++++--------------------------
>>   drivers/cxl/cxl.h             |  2 +-
>>   drivers/cxl/port.c            |  2 +-
>>   tools/testing/cxl/test/mock.c |  4 +-
>>   4 files changed, 23 insertions(+), 59 deletions(-)
>>
> 
>