mbox series

[v4,0/4] cxl: Fixes for hdm decoder initialization from DVSEC ranges

Message ID 20240828084231.1378789-1-yanfei.xu@intel.com
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Series cxl: Fixes for hdm decoder initialization from DVSEC ranges | expand

Message

Yanfei Xu Aug. 28, 2024, 8:42 a.m. UTC 
The first and third patch are intended to fix potential issues regarding to
retrieve and record DVSEC ranges. The second and fourth are cleanup.

v3->v4:
- improved the commit messages for patch2 and patch3 based on Jonathan's
  comments.
- collected "Reviewed-by" from Jonathan
v3:https://lore.kernel.org/all/20240813110532.870869-3-yanfei.xu@intel.com/T/

v2->v3:
- improved the commit message of patch1 to indicate potential impact of
  the change.  (Dan)
- Dropped un-appropriate "Fixes" tag. (Dan)
- Dropped the patch2 which is a code movement in original patchset.
- Separated the original patch3 into cleanup one and logic change one which
  are corresponding to patch2 and patch3 in current patchset. (Dan)
v2:https://lore.kernel.org/linux-cxl/20240809093442.646545-1-yanfei.xu@intel.com/T/#t

Yanfei Xu (4):
  cxl/pci: Fix to record only non-zero ranges
  cxl/pci: Remove duplicated implementation of waiting for
    memory_info_valid
  cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
  cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()

 drivers/cxl/core/pci.c        | 74 +++++++++--------------------------
 drivers/cxl/cxl.h             |  2 +-
 drivers/cxl/port.c            |  2 +-
 tools/testing/cxl/test/mock.c |  4 +-
 4 files changed, 23 insertions(+), 59 deletions(-)