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From: alison.schofield@intel.com
To: Dan Williams <dan.j.williams@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Dave Jiang <dave.jiang@intel.com>
Cc: Alison Schofield <alison.schofield@intel.com>,
linux-cxl@vger.kernel.org
Subject: [PATCH 0/2] CXL XOR Interleave Arithmetic
Date: Tue, 9 Aug 2022 14:44:08 -0700
Message-Id: <cover.1660079951.git.alison.schofield@intel.com>
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CXL XOR Interleave Arithmetic
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From: Alison Schofield <alison.schofield@intel.com> Add support for the new 'XOR' Interleave Arithmetic as defined in the CXL 3.0 Specification [1]. A linux-ized ACPI patch is included here for reference. The actual pull request is pending at https://github.com/acpica/acpica/pull/787 [1]: https://www.computeexpresslink.org/download-the-specification Alison Schofield (2): For ACPICA: Add the CXIMS structure definition to the CEDT table cxl/acpi: Support CXL XOR Interleave Math (CXIMS) include/acpi/actbl1.h | 14 ++++++- drivers/cxl/cxl.h | 2 + drivers/cxl/acpi.c | 96 ++++++++++++++++++++++++++++++++++++++++--- 3 files changed, 106 insertions(+), 6 deletions(-) base-commit: 1cd8a2537eb07751d405ab7e2223f20338a90506