Show patches with: Submitter = Terry Bowman       |    Archived = No       |   143 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[RFC,9/9] cxl/pci: Enable interrupts for CXL PCIe ports' AER internal errors Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,8/9] PCI/AER: Export pci_aer_unmask_internal_errors() Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,7/9] cxl/pci: Add atomic notifier callback for CXL PCIe port AER internal errors Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,6/9] cxl/pci: Add trace logging for CXL PCIe port RAS errors Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,5/9] cxl/pci: Update RAS handler interfaces to support CXL PCIe ports Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - 1 - --- 2024-06-17 Terry Bowman New
[RFC,4/9] cxl/pci: Map CXL PCIe ports' RAS registers Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,3/9] PCI/portdrv: Update portdrv with an atomic notifier for reporting AER internal errors Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
[RFC,2/9] PCI/AER: Call AER CE handler before clearing AER CE status register Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports 1 1 - --- 2024-06-17 Terry Bowman New
[RFC,1/9] PCI/AER: Update AER driver to call root port and downstream port UCE handlers Add RAS support for CXL root ports, CXL downstream switch ports, and CXL upstream switch ports - - - --- 2024-06-17 Terry Bowman New
cxl/pci: Change CXL AER support check to use native AER cxl/pci: Change CXL AER support check to use native AER - 1 - --- 2023-11-02 Terry Bowman Accepted
[v10,14/15] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling Untitled series #780900 1 2 - --- 2023-08-31 Terry Bowman Accepted
[v10,06/15] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-08-31 Terry Bowman Accepted
[v9,14/15] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-08-25 Terry Bowman Accepted
[v9,06/15] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-08-25 Terry Bowman Accepted
[v8,14/14] cxl/core/regs: Rename phys_addr in cxl_map_component_regs() cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-30 Terry Bowman Superseded
[v8,13/14] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,12/14] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,11/14] cxl/pci: Disable root port interrupts in RCH mode cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,10/14] cxl/pci: Add RCH downstream port error logging cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,09/14] cxl/pci: Map RCH downstream AER registers for logging protocol errors cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,08/14] cxl/pci: Update CXL error logging to use RAS register address cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,07/14] PCI/AER: Refactor cper_print_aer() for use by CXL driver module cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,06/14] cxl/pci: Add RCH downstream port AER register discovery cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,05/14] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,04/14] cxl/pci: Remove Component Register base address from struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,03/14] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,02/14] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-30 Terry Bowman Superseded
[v8,01/14] cxl/port: Pre-initialize component register mappings cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-30 Terry Bowman Superseded
[v7,27/27] cxl/core/regs: Rename phys_addr in cxl_map_component_regs() cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,26/27] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,25/27] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,24/27] cxl/pci: Disable root port interrupts in RCH mode cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,23/27] cxl/pci: Add RCH downstream port error logging cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,22/27] cxl/pci: Map RCH downstream AER registers for logging protocol errors cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,21/27] cxl/pci: Update CXL error logging to use RAS register address cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,20/27] PCI/AER: Refactor cper_print_aer() for use by CXL driver module cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-06-22 Terry Bowman Superseded
[v7,19/27] cxl/pci: Add RCH downstream port AER register discovery cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,18/27] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,17/27] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,16/27] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,15/27] cxl/port: Store the downstream port's Component Register mappings in struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,14/27] cxl/port: Store the port's Component Register mappings in struct cxl_port cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,13/27] cxl/pci: Early setup RCH dport component registers from RCRB cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,12/27] cxl/mem: Prepare for early RCH dport component register setup cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,11/27] cxl/regs: Remove early capability checks in Component Register setup cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,10/27] cxl/port: Remove Component Register base address from struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,09/27] cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's port cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,08/27] cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs() cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,07/27] cxl/pci: Refactor component register discovery for reuse cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,06/27] cxl/core/regs: Add @dev to cxl_register_map cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,05/27] cxl: Rename 'uport' to 'uport_dev' cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,04/27] cxl: Rename member @dport of struct cxl_dport to @dport_dev cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,03/27] cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v7,02/27] cxl: Updates for CXL Test to work with RCH cxl/pci: Add support for RCH RAS error handling - - - --- 2023-06-22 Terry Bowman Superseded
[v7,01/27] cxl/acpi: Probe RCRB later during RCH downstream port creation cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,27/27] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,26/27] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler cxl/pci: Add support for RCH RAS error handling 1 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,25/27] cxl/pci: Disable root port interrupts in RCH mode cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,24/27] cxl/pci: Add RCH downstream port error logging cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,23/27] cxl/pci: Map RCH downstream AER registers for logging protocol errors cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,22/27] cxl/pci: Update CXL error logging to use RAS register address cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,21/27] PCI/AER: Refactor cper_print_aer() for use by CXL driver module cxl/pci: Add support for RCH RAS error handling 1 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,20/27] cxl/pci: Add RCH downstream port AER register discovery cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,19/27] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,18/27] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,17/27] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,16/27] cxl/port: Store the downstream port's Component Register mappings in struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,15/27] cxl/port: Store the port's Component Register mappings in struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,14/27] cxl/pci: Early setup RCH dport component registers from RCRB cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,13/27] cxl/mem: Prepare for early RCH dport component register setup cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,12/27] cxl/regs: Remove early capability checks in Component Register setup cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,11/27] cxl/port: Remove Component Register base address from struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,10/27] cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,09/27] cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs() cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,08/27] cxl/pci: Refactor component register discovery for reuse cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,07/27] cxl/core/regs: Add @dev to cxl_register_map cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,06/27] cxl: Rename 'uport' to 'uport_dev' cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,05/27] cxl: Rename member @dport of struct cxl_dport to @dport_dev cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,04/27] cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,03/27] cxl: Updates for CXL Test to work with RCH cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v6,02/27] cxl/acpi: Probe RCRB later during RCH downstream port creation cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-06-22 Terry Bowman Superseded
[v6,01/27] cxl/port: Fix NULL pointer access in devm_cxl_add_port() cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-22 Terry Bowman Superseded
[v5,26/26] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 - - --- 2023-06-07 Terry Bowman Superseded
[v5,25/26] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler cxl/pci: Add support for RCH RAS error handling 1 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,24/26] cxl/pci: Add RCH downstream port error logging cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,23/26] cxl/pci: Disable root port interrupts in RCH mode cxl/pci: Add support for RCH RAS error handling - - - --- 2023-06-07 Terry Bowman Superseded
[v5,22/26] cxl/pci: Map RCH downstream AER registers for logging protocol errors cxl/pci: Add support for RCH RAS error handling - - - --- 2023-06-07 Terry Bowman Superseded
[v5,21/26] cxl/pci: Update CXL error logging to use RAS register address cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,20/26] PCI/AER: Refactor cper_print_aer() for use by CXL driver module cxl/pci: Add support for RCH RAS error handling 1 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,19/26] cxl/pci: Add RCH downstream port AER register discovery cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,18/26] cxl/pci: Remove Component Register base address from struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,17/26] cxl/port: Remove Component Register base address from struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,16/26] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,15/26] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,14/26] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,13/26] cxl/port: Store the downstream port's Component Register mappings in struct cxl_dport cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,12/26] cxl/port: Store the port's Component Register mappings in struct cxl_port cxl/pci: Add support for RCH RAS error handling - - - --- 2023-06-07 Terry Bowman Superseded
[v5,11/26] cxl/pci: Early setup RCH dport component registers from RCRB cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
[v5,10/26] cxl/mem: Prepare for early RCH dport component register setup cxl/pci: Add support for RCH RAS error handling - - - --- 2023-06-07 Terry Bowman Superseded
[v5,09/26] cxl/regs: Remove early capability checks in Component Register setup cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-06-07 Terry Bowman Superseded
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