diff mbox series

[v5,1/6] cxl/acpi: Local definition of ACPICA infrastructure

Message ID 162295949886.1109360.17423894188288323907.stgit@dwillia2-desk3.amr.corp.intel.com
State Superseded
Headers show
Series CXL port and decoder enumeration | expand

Commit Message

Dan Williams June 6, 2021, 6:04 a.m. UTC
The recently released CXL specification change (ECN) for the CXL Fixed
Memory Window Structure (CFMWS) extension to the CXL Early Discovery
Table (CEDT) enables a large amount of functionality. It defines the
root of a CXL memory topology and is needed for all OS flows for CXL
provisioning CXL memory expanders. For ease of merging and tree
management add the new ACPI definition locally (drivers/cxl/acpi.h) in
such a way that they will not collide with the eventual arrival of the
definitions through the ACPICA project to their final location
(drivers/acpi/actbl1.h).

The definitions in drivers/cxl/acpi.h can be dropped post -rc1.

Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Co-developed-by: Alison Schofield <alison.schofield@intel.com>
Co-developed-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
 drivers/cxl/acpi.h |   48 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 drivers/cxl/acpi.h

Comments

Rafael J. Wysocki June 7, 2021, 12:25 p.m. UTC | #1
On Sun, Jun 6, 2021 at 8:05 AM Dan Williams <dan.j.williams@intel.com> wrote:
>
> The recently released CXL specification change (ECN) for the CXL Fixed
> Memory Window Structure (CFMWS) extension to the CXL Early Discovery
> Table (CEDT) enables a large amount of functionality. It defines the
> root of a CXL memory topology and is needed for all OS flows for CXL
> provisioning CXL memory expanders. For ease of merging and tree
> management add the new ACPI definition locally (drivers/cxl/acpi.h) in
> such a way that they will not collide with the eventual arrival of the
> definitions through the ACPICA project to their final location
> (drivers/acpi/actbl1.h).

I've just applied the ACPICA series including this change which can be
made available as a forward-only branch in my tree, if that helps.

> The definitions in drivers/cxl/acpi.h can be dropped post -rc1.
>
> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> Co-developed-by: Alison Schofield <alison.schofield@intel.com>
> Co-developed-by: Erik Kaneda <erik.kaneda@intel.com>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
>  drivers/cxl/acpi.h |   48 ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 drivers/cxl/acpi.h
>
> diff --git a/drivers/cxl/acpi.h b/drivers/cxl/acpi.h
> new file mode 100644
> index 000000000000..1482c19e7227
> --- /dev/null
> +++ b/drivers/cxl/acpi.h
> @@ -0,0 +1,48 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/* Copyright(c) 2021 Intel Corporation. */
> +#ifndef __CXL_ACPI_H__
> +#define __CXL_ACPI_H__
> +
> +#ifndef ACPI_CEDT_CHBS_VERSION_CXL20
> +/*
> + * NOTE: These definitions are temporary and to be deleted in v5.14-rc1
> + * when the identical definitions become available from
> + * include/acpi/actbl1.h.
> + */
> +
> +#define ACPI_CEDT_TYPE_CFMWS 1
> +#define ACPI_CEDT_TYPE_RESERVED 2
> +
> +#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
> +#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
> +
> +#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
> +#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
> +
> +struct acpi_cedt_cfmws {
> +       struct acpi_cedt_header header;
> +       u32 reserved1;
> +       u64 base_hpa;
> +       u64 window_size;
> +       u8 interleave_ways;
> +       u8 interleave_arithmetic;
> +       u16 reserved2;
> +       u32 granularity;
> +       u16 restrictions;
> +       u16 qtg_id;
> +       u32 interleave_targets[];
> +};
> +
> +/* Values for Interleave Arithmetic field above */
> +
> +#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
> +
> +/* Values for Restrictions field above */
> +
> +#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
> +#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1 << 1)
> +#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1 << 2)
> +#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1 << 3)
> +#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1 << 4)
> +#endif /* ACPI_CEDT_CHBS_VERSION_CXL20 */
> +#endif /* __CXL_ACPI_H__ */
>
Dan Williams June 7, 2021, 5:03 p.m. UTC | #2
On Mon, Jun 7, 2021 at 5:26 AM Rafael J. Wysocki <rafael@kernel.org> wrote:
>
> On Sun, Jun 6, 2021 at 8:05 AM Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > The recently released CXL specification change (ECN) for the CXL Fixed
> > Memory Window Structure (CFMWS) extension to the CXL Early Discovery
> > Table (CEDT) enables a large amount of functionality. It defines the
> > root of a CXL memory topology and is needed for all OS flows for CXL
> > provisioning CXL memory expanders. For ease of merging and tree
> > management add the new ACPI definition locally (drivers/cxl/acpi.h) in
> > such a way that they will not collide with the eventual arrival of the
> > definitions through the ACPICA project to their final location
> > (drivers/acpi/actbl1.h).
>
> I've just applied the ACPICA series including this change which can be
> made available as a forward-only branch in my tree, if that helps.

Yes, please, that would be my preference. When I created this patch
the concern was that a stable branch was possibly weeks away.
Dan Williams June 8, 2021, 6:13 p.m. UTC | #3
On Mon, Jun 7, 2021 at 10:03 AM Dan Williams <dan.j.williams@intel.com> wrote:
>
> On Mon, Jun 7, 2021 at 5:26 AM Rafael J. Wysocki <rafael@kernel.org> wrote:
> >
> > On Sun, Jun 6, 2021 at 8:05 AM Dan Williams <dan.j.williams@intel.com> wrote:
> > >
> > > The recently released CXL specification change (ECN) for the CXL Fixed
> > > Memory Window Structure (CFMWS) extension to the CXL Early Discovery
> > > Table (CEDT) enables a large amount of functionality. It defines the
> > > root of a CXL memory topology and is needed for all OS flows for CXL
> > > provisioning CXL memory expanders. For ease of merging and tree
> > > management add the new ACPI definition locally (drivers/cxl/acpi.h) in
> > > such a way that they will not collide with the eventual arrival of the
> > > definitions through the ACPICA project to their final location
> > > (drivers/acpi/actbl1.h).
> >
> > I've just applied the ACPICA series including this change which can be
> > made available as a forward-only branch in my tree, if that helps.
>
> Yes, please, that would be my preference. When I created this patch
> the concern was that a stable branch was possibly weeks away.

Rafael, I see "4a2c1dcfaf59 ACPICA: Add the CFMWS structure definition
to the CEDT table" in your tree, I can safely assume that commit will
not rebase at this point? I'll likely rewind your acpica branch to
that point and merge there to avoid carrying any unrelated follow-on
commits.
Rafael J. Wysocki June 8, 2021, 7:29 p.m. UTC | #4
On Tue, Jun 8, 2021 at 8:13 PM Dan Williams <dan.j.williams@intel.com> wrote:
>
> On Mon, Jun 7, 2021 at 10:03 AM Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > On Mon, Jun 7, 2021 at 5:26 AM Rafael J. Wysocki <rafael@kernel.org> wrote:
> > >
> > > On Sun, Jun 6, 2021 at 8:05 AM Dan Williams <dan.j.williams@intel.com> wrote:
> > > >
> > > > The recently released CXL specification change (ECN) for the CXL Fixed
> > > > Memory Window Structure (CFMWS) extension to the CXL Early Discovery
> > > > Table (CEDT) enables a large amount of functionality. It defines the
> > > > root of a CXL memory topology and is needed for all OS flows for CXL
> > > > provisioning CXL memory expanders. For ease of merging and tree
> > > > management add the new ACPI definition locally (drivers/cxl/acpi.h) in
> > > > such a way that they will not collide with the eventual arrival of the
> > > > definitions through the ACPICA project to their final location
> > > > (drivers/acpi/actbl1.h).
> > >
> > > I've just applied the ACPICA series including this change which can be
> > > made available as a forward-only branch in my tree, if that helps.
> >
> > Yes, please, that would be my preference. When I created this patch
> > the concern was that a stable branch was possibly weeks away.
>
> Rafael, I see "4a2c1dcfaf59 ACPICA: Add the CFMWS structure definition
> to the CEDT table" in your tree, I can safely assume that commit will
> not rebase at this point?

Yes, please.

> I'll likely rewind your acpica branch to
> that point and merge there to avoid carrying any unrelated follow-on
> commits.

Sure.
diff mbox series

Patch

diff --git a/drivers/cxl/acpi.h b/drivers/cxl/acpi.h
new file mode 100644
index 000000000000..1482c19e7227
--- /dev/null
+++ b/drivers/cxl/acpi.h
@@ -0,0 +1,48 @@ 
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright(c) 2021 Intel Corporation. */
+#ifndef __CXL_ACPI_H__
+#define __CXL_ACPI_H__
+
+#ifndef ACPI_CEDT_CHBS_VERSION_CXL20
+/*
+ * NOTE: These definitions are temporary and to be deleted in v5.14-rc1
+ * when the identical definitions become available from
+ * include/acpi/actbl1.h.
+ */
+
+#define ACPI_CEDT_TYPE_CFMWS 1
+#define ACPI_CEDT_TYPE_RESERVED 2
+
+#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
+#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
+
+#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
+#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
+
+struct acpi_cedt_cfmws {
+	struct acpi_cedt_header header;
+	u32 reserved1;
+	u64 base_hpa;
+	u64 window_size;
+	u8 interleave_ways;
+	u8 interleave_arithmetic;
+	u16 reserved2;
+	u32 granularity;
+	u16 restrictions;
+	u16 qtg_id;
+	u32 interleave_targets[];
+};
+
+/* Values for Interleave Arithmetic field above */
+
+#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
+
+/* Values for Restrictions field above */
+
+#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
+#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1 << 1)
+#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1 << 2)
+#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1 << 3)
+#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1 << 4)
+#endif /* ACPI_CEDT_CHBS_VERSION_CXL20 */
+#endif /* __CXL_ACPI_H__ */