| Message ID | 163116430804.2460985.5482188351381597529.stgit@dwillia2-desk3.amr.corp.intel.com |
|---|---|
| State | New, archived |
| Headers | show |
| Series | cxl_test: Enable CXL Topology and UAPI regression tests | expand |
On Wed, 8 Sep 2021 22:11:48 -0700 Dan Williams <dan.j.williams@intel.com> wrote: > The CXL specification defines a mechanism for namespaces to be comprised > of multiple dis-contiguous ranges. Introduce that concept to the legacy > NVDIMM namespace implementation with a new nsl_set_nrange() helper, that > sets the number of ranges to 1. Once the NVDIMM subsystem supports CXL > labels and updates its namespace capacity provisioning for > dis-contiguous support nsl_set_nrange() can be updated, but in the > meantime CXL label validation requires nrange be non-zero. > > Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> (gave tag on v3 and this looks to be the same). Thanks, Jonathan > --- > drivers/nvdimm/label.c | 1 + > drivers/nvdimm/nd.h | 13 +++++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c > index e7fdb718ebf0..7832b190efd7 100644 > --- a/drivers/nvdimm/label.c > +++ b/drivers/nvdimm/label.c > @@ -856,6 +856,7 @@ static int __pmem_label_update(struct nd_region *nd_region, > nsl_set_name(ndd, nd_label, nspm->alt_name); > nsl_set_flags(ndd, nd_label, flags); > nsl_set_nlabel(ndd, nd_label, nd_region->ndr_mappings); > + nsl_set_nrange(ndd, nd_label, 1); > nsl_set_position(ndd, nd_label, pos); > nsl_set_isetcookie(ndd, nd_label, cookie); > nsl_set_rawsize(ndd, nd_label, resource_size(res)); > diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h > index 036638bdb7e3..d57f95a48fe1 100644 > --- a/drivers/nvdimm/nd.h > +++ b/drivers/nvdimm/nd.h > @@ -164,6 +164,19 @@ static inline void nsl_set_nlabel(struct nvdimm_drvdata *ndd, > nd_label->nlabel = __cpu_to_le16(nlabel); > } > > +static inline u16 nsl_get_nrange(struct nvdimm_drvdata *ndd, > + struct nd_namespace_label *nd_label) > +{ > + /* EFI labels do not have an nrange field */ > + return 1; > +} > + > +static inline void nsl_set_nrange(struct nvdimm_drvdata *ndd, > + struct nd_namespace_label *nd_label, > + u16 nrange) > +{ > +} > + > static inline u64 nsl_get_lbasize(struct nvdimm_drvdata *ndd, > struct nd_namespace_label *nd_label) > { >
On Thu, Sep 9, 2021 at 6:10 AM Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote: > > On Wed, 8 Sep 2021 22:11:48 -0700 > Dan Williams <dan.j.williams@intel.com> wrote: > > > The CXL specification defines a mechanism for namespaces to be comprised > > of multiple dis-contiguous ranges. Introduce that concept to the legacy > > NVDIMM namespace implementation with a new nsl_set_nrange() helper, that > > sets the number of ranges to 1. Once the NVDIMM subsystem supports CXL > > labels and updates its namespace capacity provisioning for > > dis-contiguous support nsl_set_nrange() can be updated, but in the > > meantime CXL label validation requires nrange be non-zero. > > > > Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > (gave tag on v3 and this looks to be the same). Whoops, sorry about that, now recorded.
diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index e7fdb718ebf0..7832b190efd7 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -856,6 +856,7 @@ static int __pmem_label_update(struct nd_region *nd_region, nsl_set_name(ndd, nd_label, nspm->alt_name); nsl_set_flags(ndd, nd_label, flags); nsl_set_nlabel(ndd, nd_label, nd_region->ndr_mappings); + nsl_set_nrange(ndd, nd_label, 1); nsl_set_position(ndd, nd_label, pos); nsl_set_isetcookie(ndd, nd_label, cookie); nsl_set_rawsize(ndd, nd_label, resource_size(res)); diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 036638bdb7e3..d57f95a48fe1 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -164,6 +164,19 @@ static inline void nsl_set_nlabel(struct nvdimm_drvdata *ndd, nd_label->nlabel = __cpu_to_le16(nlabel); } +static inline u16 nsl_get_nrange(struct nvdimm_drvdata *ndd, + struct nd_namespace_label *nd_label) +{ + /* EFI labels do not have an nrange field */ + return 1; +} + +static inline void nsl_set_nrange(struct nvdimm_drvdata *ndd, + struct nd_namespace_label *nd_label, + u16 nrange) +{ +} + static inline u64 nsl_get_lbasize(struct nvdimm_drvdata *ndd, struct nd_namespace_label *nd_label) {
The CXL specification defines a mechanism for namespaces to be comprised of multiple dis-contiguous ranges. Introduce that concept to the legacy NVDIMM namespace implementation with a new nsl_set_nrange() helper, that sets the number of ranges to 1. Once the NVDIMM subsystem supports CXL labels and updates its namespace capacity provisioning for dis-contiguous support nsl_set_nrange() can be updated, but in the meantime CXL label validation requires nrange be non-zero. Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- drivers/nvdimm/label.c | 1 + drivers/nvdimm/nd.h | 13 +++++++++++++ 2 files changed, 14 insertions(+)