| Message ID | 164298422510.3018233.14693126572756675563.stgit@dwillia2-desk3.amr.corp.intel.com |
|---|---|
| State | Accepted |
| Commit | af9cae9facc2de773b4aa59916913cfd6e18bdd0 |
| Headers | show |
| Series | CXL.mem Topology Discovery and Hotplug Support | expand |
On Sun, 23 Jan 2022 16:30:25 -0800 Dan Williams <dan.j.williams@intel.com> wrote: > Similar to the mem.h rename, if the core wants to reuse definitions from > drivers/cxl/pci.h it is unable to use <pci.h> as that collides with > archs that have an arch/$arch/include/asm/pci.h, like MIPS. > > Reported-by: kernel test robot <lkp@intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Does this perhaps want a fixes tag? Otherwise, fair enough I guess. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/cxl/acpi.c | 2 +- > drivers/cxl/core/regs.c | 2 +- > drivers/cxl/cxlpci.h | 1 + > drivers/cxl/pci.c | 2 +- > 4 files changed, 4 insertions(+), 3 deletions(-) > rename drivers/cxl/{pci.h => cxlpci.h} (99%) > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c > index e596dc375267..3485ae9d3baf 100644 > --- a/drivers/cxl/acpi.c > +++ b/drivers/cxl/acpi.c > @@ -6,8 +6,8 @@ > #include <linux/kernel.h> > #include <linux/acpi.h> > #include <linux/pci.h> > +#include "cxlpci.h" > #include "cxl.h" > -#include "pci.h" > > /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */ > #define CFMWS_INTERLEAVE_WAYS(x) (1 << (x)->interleave_ways) > diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c > index 12a6cbddf110..65d7f5880671 100644 > --- a/drivers/cxl/core/regs.c > +++ b/drivers/cxl/core/regs.c > @@ -5,7 +5,7 @@ > #include <linux/slab.h> > #include <linux/pci.h> > #include <cxlmem.h> > -#include <pci.h> > +#include <cxlpci.h> > > /** > * DOC: cxl registers > diff --git a/drivers/cxl/pci.h b/drivers/cxl/cxlpci.h > similarity index 99% > rename from drivers/cxl/pci.h > rename to drivers/cxl/cxlpci.h > index 0623bb85f30a..eb00f597a157 100644 > --- a/drivers/cxl/pci.h > +++ b/drivers/cxl/cxlpci.h > @@ -2,6 +2,7 @@ > /* Copyright(c) 2020 Intel Corporation. All rights reserved. */ > #ifndef __CXL_PCI_H__ > #define __CXL_PCI_H__ > +#include "cxl.h" > > #define CXL_MEMORY_PROGIF 0x10 > > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c > index bdfeb92ed028..c29d50660c21 100644 > --- a/drivers/cxl/pci.c > +++ b/drivers/cxl/pci.c > @@ -10,7 +10,7 @@ > #include <linux/pci.h> > #include <linux/io.h> > #include "cxlmem.h" > -#include "pci.h" > +#include "cxlpci.h" > #include "cxl.h" > > /** >
On 22-01-23 16:30:25, Dan Williams wrote: > Similar to the mem.h rename, if the core wants to reuse definitions from > drivers/cxl/pci.h it is unable to use <pci.h> as that collides with > archs that have an arch/$arch/include/asm/pci.h, like MIPS. > > Reported-by: kernel test robot <lkp@intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Ben Widawsky <ben.widawsky@intel.com> [snip]
On Mon, Jan 31, 2022 at 8:35 AM Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote: > > On Sun, 23 Jan 2022 16:30:25 -0800 > Dan Williams <dan.j.williams@intel.com> wrote: > > > Similar to the mem.h rename, if the core wants to reuse definitions from > > drivers/cxl/pci.h it is unable to use <pci.h> as that collides with > > archs that have an arch/$arch/include/asm/pci.h, like MIPS. > > > > Reported-by: kernel test robot <lkp@intel.com> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > > Does this perhaps want a fixes tag? > It doesn't need one because it's not until this set that the drivers/cxl/core/ reaches out of its own directory to include this.
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index e596dc375267..3485ae9d3baf 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -6,8 +6,8 @@ #include <linux/kernel.h> #include <linux/acpi.h> #include <linux/pci.h> +#include "cxlpci.h" #include "cxl.h" -#include "pci.h" /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */ #define CFMWS_INTERLEAVE_WAYS(x) (1 << (x)->interleave_ways) diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index 12a6cbddf110..65d7f5880671 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -5,7 +5,7 @@ #include <linux/slab.h> #include <linux/pci.h> #include <cxlmem.h> -#include <pci.h> +#include <cxlpci.h> /** * DOC: cxl registers diff --git a/drivers/cxl/pci.h b/drivers/cxl/cxlpci.h similarity index 99% rename from drivers/cxl/pci.h rename to drivers/cxl/cxlpci.h index 0623bb85f30a..eb00f597a157 100644 --- a/drivers/cxl/pci.h +++ b/drivers/cxl/cxlpci.h @@ -2,6 +2,7 @@ /* Copyright(c) 2020 Intel Corporation. All rights reserved. */ #ifndef __CXL_PCI_H__ #define __CXL_PCI_H__ +#include "cxl.h" #define CXL_MEMORY_PROGIF 0x10 diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index bdfeb92ed028..c29d50660c21 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -10,7 +10,7 @@ #include <linux/pci.h> #include <linux/io.h> #include "cxlmem.h" -#include "pci.h" +#include "cxlpci.h" #include "cxl.h" /**
Similar to the mem.h rename, if the core wants to reuse definitions from drivers/cxl/pci.h it is unable to use <pci.h> as that collides with archs that have an arch/$arch/include/asm/pci.h, like MIPS. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- drivers/cxl/acpi.c | 2 +- drivers/cxl/core/regs.c | 2 +- drivers/cxl/cxlpci.h | 1 + drivers/cxl/pci.c | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) rename drivers/cxl/{pci.h => cxlpci.h} (99%)