diff mbox series

[v2,3/6] cxl/mem: Make cxl_dvsec_range() init failure fatal

Message ID 164730735324.3806189.4167509857771192422.stgit@dwillia2-desk3.amr.corp.intel.com
State Accepted
Commit fbaf2b079d2a0a9c7114fbd4d1c0f3dd7a3cb3ad
Headers show
Series cxl: Handle DVSEC range init failures | expand

Commit Message

Dan Williams March 15, 2022, 1:22 a.m. UTC
In preparation for the cxl_pci driver to continue operation after
cxl_dvsec_range() failure, update cxl_mem to check for negative error
codes in info->ranges. Treat that condition as fatal regardless of the
state of the HDM configuration since cxl_mem needs positive confirmation
that legacy ranges were not established by platform firmware or another
agent.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
 drivers/cxl/mem.c |    3 +++
 1 file changed, 3 insertions(+)

Comments

Davidlohr Bueso March 16, 2022, 2 a.m. UTC | #1
On Mon, 14 Mar 2022, Dan Williams wrote:

>In preparation for the cxl_pci driver to continue operation after
>cxl_dvsec_range() failure, update cxl_mem to check for negative error
>codes in info->ranges. Treat that condition as fatal regardless of the
>state of the HDM configuration since cxl_mem needs positive confirmation
>that legacy ranges were not established by platform firmware or another
>agent.
>
>Signed-off-by: Dan Williams <dan.j.williams@intel.com>
>---
> drivers/cxl/mem.c |    3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
>index cd4e8bba82aa..50704deb2ff0 100644
>--- a/drivers/cxl/mem.c
>+++ b/drivers/cxl/mem.c
>@@ -88,6 +88,9 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
>	void __iomem *crb;
>	u32 global_ctrl;
>
>+	if (info->ranges < 0)
>+		return false;
>+

Nit: shouldn't this be part of the next patch that actually implements negative
info->ranges?

Thanks,
Davidlohr
Dan Williams March 16, 2022, 2:14 a.m. UTC | #2
On Tue, Mar 15, 2022 at 7:01 PM Davidlohr Bueso <dave@stgolabs.net> wrote:
>
> On Mon, 14 Mar 2022, Dan Williams wrote:
>
> >In preparation for the cxl_pci driver to continue operation after
> >cxl_dvsec_range() failure, update cxl_mem to check for negative error
> >codes in info->ranges. Treat that condition as fatal regardless of the
> >state of the HDM configuration since cxl_mem needs positive confirmation
> >that legacy ranges were not established by platform firmware or another
> >agent.
> >
> >Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> >---
> > drivers/cxl/mem.c |    3 +++
> > 1 file changed, 3 insertions(+)
> >
> >diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> >index cd4e8bba82aa..50704deb2ff0 100644
> >--- a/drivers/cxl/mem.c
> >+++ b/drivers/cxl/mem.c
> >@@ -88,6 +88,9 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
> >       void __iomem *crb;
> >       u32 global_ctrl;
> >
> >+      if (info->ranges < 0)
> >+              return false;
> >+
>
> Nit: shouldn't this be part of the next patch that actually implements negative
> info->ranges?

I considered that. Ben had asked for a split and this patch is able to
stand alone since info->ranges is always >= 0 until the next patch.
Ben Widawsky March 17, 2022, 5:49 p.m. UTC | #3
On 22-03-14 18:22:33, Dan Williams wrote:
> In preparation for the cxl_pci driver to continue operation after
> cxl_dvsec_range() failure, update cxl_mem to check for negative error
> codes in info->ranges. Treat that condition as fatal regardless of the
> state of the HDM configuration since cxl_mem needs positive confirmation
> that legacy ranges were not established by platform firmware or another
> agent.
> 
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Jonathan Cameron March 25, 2022, 11:39 a.m. UTC | #4
On Mon, 14 Mar 2022 18:22:33 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> In preparation for the cxl_pci driver to continue operation after
> cxl_dvsec_range() failure, update cxl_mem to check for negative error
> codes in info->ranges. Treat that condition as fatal regardless of the
> state of the HDM configuration since cxl_mem needs positive confirmation
> that legacy ranges were not established by platform firmware or another
> agent.
> 
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com.

> ---
>  drivers/cxl/mem.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index cd4e8bba82aa..50704deb2ff0 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -88,6 +88,9 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
>  	void __iomem *crb;
>  	u32 global_ctrl;
>  
> +	if (info->ranges < 0)
> +		return false;
> +
>  	/* map hdm decoder */
>  	crb = ioremap(cxlds->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
>  	if (!crb) {
>
diff mbox series

Patch

diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index cd4e8bba82aa..50704deb2ff0 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c
@@ -88,6 +88,9 @@  __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
 	void __iomem *crb;
 	u32 global_ctrl;
 
+	if (info->ranges < 0)
+		return false;
+
 	/* map hdm decoder */
 	crb = ioremap(cxlds->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
 	if (!crb) {