diff mbox series

[v6,12/12] cxl/acpi: Set ACPI's CXL _OSC to indicate RCD mode support

Message ID 166993046717.1882361.10587956243041624761.stgit@dwillia2-xfh.jf.intel.com
State Accepted
Commit 3713787b9dc731eb41389ec64c4c38dade325c28
Headers show
Series cxl: Add support for Restricted CXL hosts (RCD mode) | expand

Commit Message

Dan Williams Dec. 1, 2022, 9:34 p.m. UTC 
From: Terry Bowman <terry.bowman@amd.com>

ACPI uses the CXL _OSC support method to communicate the available CXL
functionality to FW. The CXL _OSC support method includes a field to
indicate the OS is capable of RCD mode. FW can potentially change it's
operation depending on the _OSC support method reported by the OS.

The ACPI driver currently only sets the ACPI _OSC support method to
indicate CXL VH mode. Change the capability reported to also include
CXL RCD mode.

[1] CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support Field'

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
[rrichter@amd.com: Reworded patch description.]
Signed-off-by: Robert Richter <rrichter@amd.com>
Link: http://lore.kernel.org/r/Y4cRV/Sj0epVW7bE@rric.localdomain
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
 drivers/acpi/pci_root.c |    1 +
 1 file changed, 1 insertion(+)

Comments

Jonathan Cameron Dec. 2, 2022, 5:05 p.m. UTC | #1 
On Thu, 01 Dec 2022 13:34:27 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> From: Terry Bowman <terry.bowman@amd.com>
> 
> ACPI uses the CXL _OSC support method to communicate the available CXL
> functionality to FW. The CXL _OSC support method includes a field to
> indicate the OS is capable of RCD mode. FW can potentially change it's
> operation depending on the _OSC support method reported by the OS.
> 
> The ACPI driver currently only sets the ACPI _OSC support method to
> indicate CXL VH mode. Change the capability reported to also include
> CXL RCD mode.
> 
> [1] CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support Field'
> 
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> [rrichter@amd.com: Reworded patch description.]
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Link: http://lore.kernel.org/r/Y4cRV/Sj0epVW7bE@rric.localdomain
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Mostly for completeness rather than because a review of this patch
brings any value as it's 'obviously correct'.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
>  drivers/acpi/pci_root.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> index 4e3db20e9cbb..b3c202d2a433 100644
> --- a/drivers/acpi/pci_root.c
> +++ b/drivers/acpi/pci_root.c
> @@ -493,6 +493,7 @@ static u32 calculate_cxl_support(void)
>  	u32 support;
>  
>  	support = OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT;
> +	support |= OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT;
>  	if (pci_aer_available())
>  		support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT;
>  	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
>
diff mbox series

Patch

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 4e3db20e9cbb..b3c202d2a433 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -493,6 +493,7 @@  static u32 calculate_cxl_support(void)
 	u32 support;
 
 	support = OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT;
+	support |= OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT;
 	if (pci_aer_available())
 		support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT;
 	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))