Message ID | 167097754348.1189953.15721727640159522971.stgit@dwillia2-xfh.jf.intel.com |
---|---|
State | Accepted |
Commit | 6431da517590abcf3729a58358391a60c15859ef |
Headers | show |
Series | cxl/test: Reliability fixes | expand |
diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh index fc3bbbe6b84a..89d01a89ccb1 100644 --- a/test/cxl-topology.sh +++ b/test/cxl-topology.sh @@ -117,7 +117,8 @@ fi # pmem size of 256M, or 1G json=$($CXL list -b cxl_test -M) count=$(jq "map(select(.pmem_size == $pmem_size)) | length" <<< $json) -((bridges == 2 && count == 8 || bridges == 3 && count == 10)) || err "$LINENO" +((bridges == 2 && count == 8 || bridges == 3 && count == 10 || + bridges == 4 && count == 11)) || err "$LINENO" # check that switch ports disappear after all of their memdevs have been
When cxl_test includes an RCD there will be 4 host-bridge and 11 memdevs adjust the test expectations accodingly. Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- test/cxl-topology.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)