| Message ID | 170006881824.2006509.7910685162281243122.stgit@djiang5-mobl3 |
|---|---|
| State | Accepted |
| Commit | 71f8e40ae4ea8df38ecf74a131286c6304379fbb |
| Headers | show |
| Series | [NDCTL,v2] cxl/Documentation: Clarify that no-op is a success for xable commands | expand |
diff --git a/Documentation/cxl/cxl-disable-bus.txt b/Documentation/cxl/cxl-disable-bus.txt index 65f695cd06c8..fd645c3233d7 100644 --- a/Documentation/cxl/cxl-disable-bus.txt +++ b/Documentation/cxl/cxl-disable-bus.txt @@ -15,6 +15,8 @@ SYNOPSIS For test and debug scenarios, disable a CXL bus and any associated memory devices from CXL.mem operations. +include::xable-no-op.txt[] + OPTIONS ------- -f:: diff --git a/Documentation/cxl/cxl-disable-memdev.txt b/Documentation/cxl/cxl-disable-memdev.txt index d39780250939..c4edb93ee94a 100644 --- a/Documentation/cxl/cxl-disable-memdev.txt +++ b/Documentation/cxl/cxl-disable-memdev.txt @@ -12,6 +12,7 @@ SYNOPSIS [verse] 'cxl disable-memdev' <mem0> [<mem1>..<memN>] [<options>] +include::xable-no-op.txt[] OPTIONS ------- diff --git a/Documentation/cxl/cxl-disable-port.txt b/Documentation/cxl/cxl-disable-port.txt index 7a22efc3b821..37bdd11c9a3f 100644 --- a/Documentation/cxl/cxl-disable-port.txt +++ b/Documentation/cxl/cxl-disable-port.txt @@ -15,6 +15,8 @@ SYNOPSIS For test and debug scenarios, disable a CXL port and any memory devices dependent on this port being active for CXL.mem operation. +include::xable-no-op.txt[] + OPTIONS ------- -e:: diff --git a/Documentation/cxl/cxl-disable-region.txt b/Documentation/cxl/cxl-disable-region.txt index 6a39aee6ea69..34f3fa06d4dd 100644 --- a/Documentation/cxl/cxl-disable-region.txt +++ b/Documentation/cxl/cxl-disable-region.txt @@ -21,6 +21,8 @@ EXAMPLE disabled 2 regions ---- +include::xable-no-op.txt[] + OPTIONS ------- include::bus-option.txt[] diff --git a/Documentation/cxl/cxl-enable-memdev.txt b/Documentation/cxl/cxl-enable-memdev.txt index 5b5ed66eadc5..e2a2e8420966 100644 --- a/Documentation/cxl/cxl-enable-memdev.txt +++ b/Documentation/cxl/cxl-enable-memdev.txt @@ -18,6 +18,8 @@ it again. This involves detecting the state of the HDM (Host Managed Device Memory) Decoders and validating that CXL.mem is enabled for each port in the device's hierarchy. +include::xable-no-op.txt[] + OPTIONS ------- <memory device(s)>:: diff --git a/Documentation/cxl/cxl-enable-port.txt b/Documentation/cxl/cxl-enable-port.txt index 50b53d1f48d1..00c40509f09e 100644 --- a/Documentation/cxl/cxl-enable-port.txt +++ b/Documentation/cxl/cxl-enable-port.txt @@ -18,6 +18,8 @@ again. This involves detecting the state of the HDM (Host Managed Device Memory) Decoders and validating that CXL.mem is enabled for each port in the device's hierarchy. +include::xable-no-op.txt[] + OPTIONS ------- -e:: diff --git a/Documentation/cxl/cxl-enable-region.txt b/Documentation/cxl/cxl-enable-region.txt index f6ef00fb945d..541d2c7de172 100644 --- a/Documentation/cxl/cxl-enable-region.txt +++ b/Documentation/cxl/cxl-enable-region.txt @@ -21,6 +21,8 @@ EXAMPLE enabled 2 regions ---- +include::xable-no-op.txt[] + OPTIONS ------- include::bus-option.txt[] diff --git a/Documentation/cxl/meson.build b/Documentation/cxl/meson.build index c5533572ef75..3e8f2030c3e0 100644 --- a/Documentation/cxl/meson.build +++ b/Documentation/cxl/meson.build @@ -25,6 +25,7 @@ filedeps = [ 'debug-option.txt', 'region-description.txt', 'decoder-option.txt', + 'xable-no-op.txt', ] cxl_manpages = [ diff --git a/Documentation/cxl/xable-no-op.txt b/Documentation/cxl/xable-no-op.txt new file mode 100644 index 000000000000..4046f49b78db --- /dev/null +++ b/Documentation/cxl/xable-no-op.txt @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: gpl-2.0 + +Given any enable or disable command, if the operation is a no-op due to the +current state of a target, it is still considered successful when executed +even if no actual operation is performed. The target can be a bus, decoder, +memdev, or region. The operation will still succeed with the number of +bus/decoder/memdev/region operated on reported, even if the operation is a +non-action.