| Message ID | 20210610215332.991905-1-ben.widawsky@intel.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | cxl/hdm: Fix decoder count calculation | expand |
On Thu, Jun 10, 2021 at 2:53 PM Ben Widawsky <ben.widawsky@intel.com> wrote: > > The decoder count in the HDM decoder capability structure is an encoded > field. As defined in the spec: > > Decoder Count: Reports the number of memory address decoders implemented > by the component. > 0 – 1 Decoder > 1 – 2 Decoders > 2 – 4 Decoders > 3 – 6 Decoders > 4 – 8 Decoders > 5 – 10 DecodersAll other values are reserved > > Nothing is actually fixed by this as nothing actually used this mapping > yet. > > Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Cc: Ira Weiny <ira.weiny@intel.com> > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > --- > drivers/cxl/core.c | 3 ++- > drivers/cxl/cxl.h | 1 + > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c > index cda09a9cd98e..92db02fe7aa8 100644 > --- a/drivers/cxl/core.c > +++ b/drivers/cxl/core.c > @@ -666,7 +666,8 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, > > hdr = readl(register_block); > > - decoder_cnt = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr); > + decoder_cnt = > + cxl_hdm_decoder_count(FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr)); How about make it a static inline helper that takes @hdr and move the FIELD_GET inside there to save some indentation? I still think it warrants a Fixes: tag, the commit ids in cxl.git/next are stable.
On Thu, 10 Jun 2021 14:53:32 -0700 Ben Widawsky <ben.widawsky@intel.com> wrote: > The decoder count in the HDM decoder capability structure is an encoded > field. As defined in the spec: > > Decoder Count: Reports the number of memory address decoders implemented > by the component. > 0 – 1 Decoder > 1 – 2 Decoders > 2 – 4 Decoders > 3 – 6 Decoders > 4 – 8 Decoders > 5 – 10 DecodersAll other values are reserved > > Nothing is actually fixed by this as nothing actually used this mapping > yet. > > Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Cc: Ira Weiny <ira.weiny@intel.com> > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> lgtm. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/cxl/core.c | 3 ++- > drivers/cxl/cxl.h | 1 + > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c > index cda09a9cd98e..92db02fe7aa8 100644 > --- a/drivers/cxl/core.c > +++ b/drivers/cxl/core.c > @@ -666,7 +666,8 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, > > hdr = readl(register_block); > > - decoder_cnt = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr); > + decoder_cnt = > + cxl_hdm_decoder_count(FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr)); > length = 0x20 * decoder_cnt + 0x10; > > map->hdm_decoder.valid = true; > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index 1ffc5e07e24d..f0dff7d96286 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -35,6 +35,7 @@ > /* HDM decoders CXL 2.0 8.2.5.12 CXL HDM Decoder Capability Structure */ > #define CXL_HDM_DECODER_CAP_OFFSET 0x0 > #define CXL_HDM_DECODER_COUNT_MASK GENMASK(3, 0) > +#define cxl_hdm_decoder_count(bits) ((bits) == 0 ? 1 : (bits) * 2) > #define CXL_HDM_DECODER_TARGET_COUNT_MASK GENMASK(7, 4) > #define CXL_HDM_DECODER0_BASE_LOW_OFFSET 0x10 > #define CXL_HDM_DECODER0_BASE_HIGH_OFFSET 0x14
diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c index cda09a9cd98e..92db02fe7aa8 100644 --- a/drivers/cxl/core.c +++ b/drivers/cxl/core.c @@ -666,7 +666,8 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, hdr = readl(register_block); - decoder_cnt = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr); + decoder_cnt = + cxl_hdm_decoder_count(FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, hdr)); length = 0x20 * decoder_cnt + 0x10; map->hdm_decoder.valid = true; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 1ffc5e07e24d..f0dff7d96286 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -35,6 +35,7 @@ /* HDM decoders CXL 2.0 8.2.5.12 CXL HDM Decoder Capability Structure */ #define CXL_HDM_DECODER_CAP_OFFSET 0x0 #define CXL_HDM_DECODER_COUNT_MASK GENMASK(3, 0) +#define cxl_hdm_decoder_count(bits) ((bits) == 0 ? 1 : (bits) * 2) #define CXL_HDM_DECODER_TARGET_COUNT_MASK GENMASK(7, 4) #define CXL_HDM_DECODER0_BASE_LOW_OFFSET 0x10 #define CXL_HDM_DECODER0_BASE_HIGH_OFFSET 0x14
The decoder count in the HDM decoder capability structure is an encoded field. As defined in the spec: Decoder Count: Reports the number of memory address decoders implemented by the component. 0 – 1 Decoder 1 – 2 Decoders 2 – 4 Decoders 3 – 6 Decoders 4 – 8 Decoders 5 – 10 DecodersAll other values are reserved Nothing is actually fixed by this as nothing actually used this mapping yet. Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- drivers/cxl/core.c | 3 ++- drivers/cxl/cxl.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-)