diff mbox series

cxl/pci: Rename CXL REGLOC ID

Message ID 20210618003009.956929-1-ben.widawsky@intel.com
State Accepted
Commit 4ad6181e4b216ed0cb52f45d3c6d2c70c8ae9243
Headers show
Series cxl/pci: Rename CXL REGLOC ID | expand

Commit Message

Ben Widawsky June 18, 2021, 12:30 a.m. UTC
The current naming is confusing and wrong. The Register Locator is
identified by the DSVSEC identifier, not an offset.

Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
 drivers/cxl/pci.c | 2 +-
 drivers/cxl/pci.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Dan Williams June 18, 2021, 12:33 a.m. UTC | #1
On Thu, Jun 17, 2021 at 5:30 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
>
> The current naming is confusing and wrong. The Register Locator is
> identified by the DSVSEC identifier, not an offset.
>
> Cc: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>

LGTM.
Jonathan Cameron June 18, 2021, 1:37 p.m. UTC | #2
On Thu, 17 Jun 2021 17:33:52 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> On Thu, Jun 17, 2021 at 5:30 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
> >
> > The current naming is confusing and wrong. The Register Locator is
> > identified by the DSVSEC identifier, not an offset.
> >
> > Cc: Dan Williams <dan.j.williams@intel.com>
> > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>  
> 
> LGTM.
Likewise. oops ;)

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
diff mbox series

Patch

diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index f8408e5f0754..4cf351a3cf99 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -1086,7 +1086,7 @@  static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
 	LIST_HEAD(register_maps);
 	int ret = 0;
 
-	regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_OFFSET);
+	regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
 	if (!regloc) {
 		dev_err(dev, "register location dvsec not found\n");
 		return -ENXIO;
diff --git a/drivers/cxl/pci.h b/drivers/cxl/pci.h
index af3ec078cf6c..dad7a831f65f 100644
--- a/drivers/cxl/pci.h
+++ b/drivers/cxl/pci.h
@@ -13,7 +13,7 @@ 
 #define PCI_DVSEC_VENDOR_ID_CXL		0x1E98
 #define PCI_DVSEC_ID_CXL		0x0
 
-#define PCI_DVSEC_ID_CXL_REGLOC_OFFSET		0x8
+#define PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID	0x8
 #define PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET	0xC
 
 /* BAR Indicator Register (BIR) */