@@ -68,8 +68,7 @@ static int cxl_acpi_cfmws_verify(struct device *dev,
return 0;
}
-static void cxl_add_cfmws_decoders(struct device *dev,
- struct cxl_port *root_port)
+static void cxl_add_cfmws_decoders(struct device *dev)
{
struct acpi_cedt_cfmws *cfmws;
struct cxl_decoder *cxld;
@@ -109,7 +108,7 @@ static void cxl_add_cfmws_decoders(struct device *dev,
}
flags = cfmws_to_decoder_flags(cfmws->restrictions);
- cxld = devm_cxl_add_decoder(dev, root_port,
+ cxld = devm_cxl_add_decoder(dev, NULL,
CFMWS_INTERLEAVE_WAYS(cfmws),
cfmws->base_hpa, cfmws->window_size,
CFMWS_INTERLEAVE_WAYS(cfmws),
@@ -301,7 +300,7 @@ static int add_host_bridge_uport(struct device *match, void *arg)
* in the CHBCR and a 1:1 passthrough decode is implied.
*/
if (ctx.count == 1) {
- cxld = devm_cxl_add_passthrough_decoder(host, port);
+ cxld = devm_cxl_add_passthrough_decoder(host);
if (IS_ERR(cxld))
return PTR_ERR(cxld);
@@ -393,7 +392,7 @@ static int cxl_acpi_probe(struct platform_device *pdev)
if (rc)
goto out;
- cxl_add_cfmws_decoders(host, root_port);
+ cxl_add_cfmws_decoders(host);
/*
* Root level scanned with host-bridge as dports, now scan host-bridges
@@ -25,6 +25,7 @@
int cxl_mem_major;
EXPORT_SYMBOL_GPL(cxl_mem_major);
static DEFINE_IDA(cxl_port_ida);
+static DEFINE_IDA(cxl_root_decoder_ida);
static ssize_t devtype_show(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -178,9 +179,13 @@ static const struct attribute_group *cxl_decoder_switch_attribute_groups[] = {
static void cxl_decoder_release(struct device *dev)
{
struct cxl_decoder *cxld = to_cxl_decoder(dev);
- struct cxl_port *port = to_cxl_port(dev->parent);
+ struct cxl_port *port = dev->parent ? to_cxl_port(dev->parent) : NULL;
+
+ if (port)
+ ida_free(&port->decoder_ida, cxld->id);
+ else
+ ida_free(&cxl_root_decoder_ida, cxld->id);
- ida_free(&port->decoder_ida, cxld->id);
kfree(cxld);
}
@@ -466,18 +471,24 @@ cxl_decoder_alloc(struct cxl_port *port, int nr_targets, resource_size_t base,
if (interleave_ways < 1)
return ERR_PTR(-EINVAL);
- device_lock(&port->dev);
- if (list_empty(&port->dports))
- rc = -EINVAL;
- device_unlock(&port->dev);
- if (rc)
- return ERR_PTR(rc);
+ if (port) {
+ device_lock(&port->dev);
+ if (list_empty(&port->dports))
+ rc = -EINVAL;
+ device_unlock(&port->dev);
+ if (rc)
+ return ERR_PTR(rc);
+ }
cxld = kzalloc(struct_size(cxld, target, nr_targets), GFP_KERNEL);
if (!cxld)
return ERR_PTR(-ENOMEM);
- rc = ida_alloc(&port->decoder_ida, GFP_KERNEL);
+ if (port)
+ rc = ida_alloc(&port->decoder_ida, GFP_KERNEL);
+ else
+ rc = ida_alloc(&cxl_root_decoder_ida, GFP_KERNEL);
+
if (rc < 0)
goto err;
@@ -494,17 +505,18 @@ cxl_decoder_alloc(struct cxl_port *port, int nr_targets, resource_size_t base,
};
/* handle implied target_list */
- if (interleave_ways == 1)
- cxld->target[0] =
- list_first_entry(&port->dports, struct cxl_dport, list);
+ if (port)
+ if (interleave_ways == 1)
+ cxld->target[0] =
+ list_first_entry(&port->dports, struct cxl_dport, list);
dev = &cxld->dev;
device_initialize(dev);
device_set_pm_not_required(dev);
- dev->parent = &port->dev;
+ dev->parent = port ? &port->dev : NULL;
dev->bus = &cxl_bus_type;
- /* root ports do not have a cxl_port_type parent */
- if (port->dev.parent->type == &cxl_port_type)
+ /* platform decoders don't have a parent */
+ if (port)
dev->type = &cxl_decoder_switch_type;
else
dev->type = &cxl_decoder_root_type;
@@ -531,7 +543,7 @@ devm_cxl_add_decoder(struct device *host, struct cxl_port *port, int nr_targets,
return cxld;
dev = &cxld->dev;
- rc = dev_set_name(dev, "decoder%d.%d", port->id, cxld->id);
+ rc = dev_set_name(dev, "decoder%d.%d", port ? port->id : 0, cxld->id);
if (rc)
goto err;
@@ -285,9 +285,9 @@ devm_cxl_add_decoder(struct device *host, struct cxl_port *port, int nr_targets,
* 0-length until the first CXL region is activated.
*/
static inline struct cxl_decoder *
-devm_cxl_add_passthrough_decoder(struct device *host, struct cxl_port *port)
+devm_cxl_add_passthrough_decoder(struct device *host)
{
- return devm_cxl_add_decoder(host, port, 1, 0, 0, 1, PAGE_SIZE,
+ return devm_cxl_add_decoder(host, NULL, 1, 0, 0, 1, PAGE_SIZE,
CXL_DECODER_EXPANDER, 0);
}
Currently, an ACPI0017 device (opaque platform thing) is parent to an ACPI0016 device (platform host bridge) child. The platform level decoders don't need a parent child relationship in order to traverse CXL hierarchy since once you get to these devices, you have a useless ACPI device instead of a CXL one. To support an upcoming expansion for CXL endpoints to be able to enumerate their decoders, support this NULL parent as a way to help distinguish decoder types. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- drivers/cxl/acpi.c | 9 ++++----- drivers/cxl/core/bus.c | 44 +++++++++++++++++++++++++++--------------- drivers/cxl/cxl.h | 4 ++-- 3 files changed, 34 insertions(+), 23 deletions(-)