@@ -48,7 +48,7 @@ static ssize_t start_show(struct device *dev, struct device_attribute *attr,
{
struct cxl_decoder *cxld = to_cxl_decoder(dev);
- return sysfs_emit(buf, "%#llx\n", cxld->range.start);
+ return sysfs_emit(buf, "%#llx\n", cxld->res.start);
}
static DEVICE_ATTR_RO(start);
@@ -57,7 +57,7 @@ static ssize_t size_show(struct device *dev, struct device_attribute *attr,
{
struct cxl_decoder *cxld = to_cxl_decoder(dev);
- return sysfs_emit(buf, "%#llx\n", range_len(&cxld->range));
+ return sysfs_emit(buf, "%#llx\n", resource_size(&cxld->res));
}
static DEVICE_ATTR_RO(size);
@@ -575,10 +575,7 @@ cxl_decoder_alloc(struct cxl_port *port, int nr_targets, resource_size_t base,
*cxld = (struct cxl_decoder) {
.id = rc,
- .range = {
- .start = base,
- .end = base + len - 1,
- },
+ .res = DEFINE_RES_MEM_NAMED(base, len, "cxl-decoder"),
.flags = flags,
.interleave_ways = interleave_ways,
.interleave_granularity = interleave_granularity,
@@ -45,8 +45,7 @@ static ssize_t offset_show(struct device *dev, struct device_attribute *attr,
if (!region->res)
return sysfs_emit(buf, "\n");
- return sysfs_emit(buf, "%#llx\n",
- cxld->range.start - region->res->start);
+ return sysfs_emit(buf, "%#llx\n", cxld->res.start - region->res->start);
}
static DEVICE_ATTR_RO(offset);
@@ -186,7 +186,7 @@ enum cxl_decoder_type {
* struct cxl_decoder - CXL address range decode configuration
* @dev: this decoder's device
* @id: kernel device name id
- * @range: address range considered by this decoder
+ * @res: address space resources considered by this decoder
* @interleave_ways: number of cxl_dports in this decode
* @interleave_granularity: data stride per dport
* @target_type: accelerator vs expander (type2 vs type3) selector
@@ -199,7 +199,7 @@ enum cxl_decoder_type {
struct cxl_decoder {
struct device dev;
int id;
- struct range range;
+ struct resource res;
int interleave_ways;
int interleave_granularity;
enum cxl_decoder_type target_type;
Regions will use the resource API in order to help manage allocated space. As regions are children of the decoder, it makes sense that the parent host the main resource to be suballocated by the region. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- drivers/cxl/core/bus.c | 9 +++------ drivers/cxl/core/region.c | 3 +-- drivers/cxl/cxl.h | 4 ++-- 3 files changed, 6 insertions(+), 10 deletions(-)