From patchwork Thu Sep 23 17:26:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 12513419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D7C4C43219 for ; Thu, 23 Sep 2021 17:26:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1DAFC61279 for ; Thu, 23 Sep 2021 17:26:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242506AbhIWR21 (ORCPT ); Thu, 23 Sep 2021 13:28:27 -0400 Received: from mga02.intel.com ([134.134.136.20]:47619 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242513AbhIWR2Z (ORCPT ); Thu, 23 Sep 2021 13:28:25 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10116"; a="211144807" X-IronPort-AV: E=Sophos;i="5.85,316,1624345200"; d="scan'208";a="211144807" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Sep 2021 10:26:54 -0700 X-IronPort-AV: E=Sophos;i="5.85,316,1624345200"; d="scan'208";a="704832533" Received: from unknown (HELO bad-guy.kumite) ([10.252.132.140]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Sep 2021 10:26:53 -0700 From: Ben Widawsky To: linux-cxl@vger.kernel.org Cc: Ben Widawsky , Dan Williams , Andrew Donnellan , Bjorn Helgaas , "David E. Box" , David Woodhouse , Frederic Barrat , Kan Liang , Lu Baolu , iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 3/9] cxl/pci: Remove pci request/release regions Date: Thu, 23 Sep 2021 10:26:41 -0700 Message-Id: <20210923172647.72738-4-ben.widawsky@intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210923172647.72738-1-ben.widawsky@intel.com> References: <20210923172647.72738-1-ben.widawsky@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Quoting Dan, "... the request + release regions should probably just be dropped. It's not like any of the register enumeration would collide with someone else who already has the registers mapped. The collision only comes when the registers are mapped for their final usage, and that will have more precision in the request." Recommended-by: Dan Williams Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/pci.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index ccc7c2573ddc..7256c236fdb3 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -453,9 +453,6 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm) return -ENXIO; } - if (pci_request_mem_regions(pdev, pci_name(pdev))) - return -ENODEV; - /* Get the size of the Register Locator DVSEC */ pci_read_config_dword(pdev, regloc + PCI_DVSEC_HEADER1, ®loc_size); regloc_size = FIELD_GET(PCI_DVSEC_HEADER1_LENGTH_MASK, regloc_size); @@ -499,8 +496,6 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm) n_maps++; } - pci_release_mem_regions(pdev); - for (i = 0; i < n_maps; i++) { ret = cxl_map_regs(cxlm, &maps[i]); if (ret)