diff mbox series

[v2] cxl: Replace HDM decoder granularity magic numbers

Message ID 20220829220249.243888-1-a.manzanares@samsung.com
State Accepted
Commit 3b39fd6cf12ceda2a2582dcb9b9ee9f4d197b857
Headers show
Series [v2] cxl: Replace HDM decoder granularity magic numbers | expand

Commit Message

Adam Manzanares Aug. 29, 2022, 10:03 p.m. UTC
When reviewing the CFMWS parsing code that deals with the HDM decoders,
I noticed a couple of magic numbers. This commit replaces these magic numbers
with constants defined by the CXL 3.0 specification.

v2:
 - Change references to CXL 3.0 specification (David)
 - CXL_DECODER_MAX_GRANULARITY_ORDER -> CXL_DECODER_MAX_ENCODED_IG (Dan)

Signed-off-by: Adam Manzanares <a.manzanares@samsung.com>
---
 drivers/cxl/cxl.h | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

Comments

Dave Jiang Sept. 28, 2022, 3:45 p.m. UTC | #1
On 8/29/2022 3:03 PM, Adam Manzanares wrote:
> When reviewing the CFMWS parsing code that deals with the HDM decoders,
> I noticed a couple of magic numbers. This commit replaces these magic numbers
> with constants defined by the CXL 3.0 specification.
>
> v2:
>   - Change references to CXL 3.0 specification (David)
>   - CXL_DECODER_MAX_GRANULARITY_ORDER -> CXL_DECODER_MAX_ENCODED_IG (Dan)
>
> Signed-off-by: Adam Manzanares <a.manzanares@samsung.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>


> ---
>   drivers/cxl/cxl.h | 11 +++++++----
>   1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index f680450f0b16..3ab81ad9d2e5 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -61,6 +61,10 @@
>   #define CXL_HDM_DECODER0_SKIP_LOW(i) CXL_HDM_DECODER0_TL_LOW(i)
>   #define CXL_HDM_DECODER0_SKIP_HIGH(i) CXL_HDM_DECODER0_TL_HIGH(i)
>   
> +/* HDM decoder control register constants CXL 3.0 8.2.5.19.7 */
> +#define CXL_DECODER_MIN_GRANULARITY 256
> +#define CXL_DECODER_MAX_ENCODED_IG 6
> +
>   static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>   {
>   	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
> @@ -71,9 +75,9 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>   /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
>   static inline int cxl_to_granularity(u16 ig, unsigned int *val)
>   {
> -	if (ig > 6)
> +	if (ig > CXL_DECODER_MAX_ENCODED_IG)
>   		return -EINVAL;
> -	*val = 256 << ig;
> +	*val = CXL_DECODER_MIN_GRANULARITY << ig;
>   	return 0;
>   }
>   
> @@ -96,7 +100,7 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>   
>   static inline int granularity_to_cxl(int g, u16 *ig)
>   {
> -	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
> +	if (g > SZ_16K || g < CXL_DECODER_MIN_GRANULARITY || !is_power_of_2(g))
>   		return -EINVAL;
>   	*ig = ilog2(g) - 8;
>   	return 0;
> @@ -248,7 +252,6 @@ enum cxl_decoder_type {
>    */
>   #define CXL_DECODER_MAX_INTERLEAVE 16
>   
> -#define CXL_DECODER_MIN_GRANULARITY 256
>   
>   /**
>    * struct cxl_decoder - Common CXL HDM Decoder Attributes
Dan Williams Oct. 21, 2022, 5:52 p.m. UTC | #2
Adam Manzanares wrote:
> When reviewing the CFMWS parsing code that deals with the HDM decoders,
> I noticed a couple of magic numbers. This commit replaces these magic numbers
> with constants defined by the CXL 3.0 specification.
> 
> v2:
>  - Change references to CXL 3.0 specification (David)
>  - CXL_DECODER_MAX_GRANULARITY_ORDER -> CXL_DECODER_MAX_ENCODED_IG (Dan)
> 
> Signed-off-by: Adam Manzanares <a.manzanares@samsung.com>

Applied for 6.2.
diff mbox series

Patch

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f680450f0b16..3ab81ad9d2e5 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -61,6 +61,10 @@ 
 #define CXL_HDM_DECODER0_SKIP_LOW(i) CXL_HDM_DECODER0_TL_LOW(i)
 #define CXL_HDM_DECODER0_SKIP_HIGH(i) CXL_HDM_DECODER0_TL_HIGH(i)
 
+/* HDM decoder control register constants CXL 3.0 8.2.5.19.7 */
+#define CXL_DECODER_MIN_GRANULARITY 256
+#define CXL_DECODER_MAX_ENCODED_IG 6
+
 static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 {
 	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
@@ -71,9 +75,9 @@  static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
 static inline int cxl_to_granularity(u16 ig, unsigned int *val)
 {
-	if (ig > 6)
+	if (ig > CXL_DECODER_MAX_ENCODED_IG)
 		return -EINVAL;
-	*val = 256 << ig;
+	*val = CXL_DECODER_MIN_GRANULARITY << ig;
 	return 0;
 }
 
@@ -96,7 +100,7 @@  static inline int cxl_to_ways(u8 eniw, unsigned int *val)
 
 static inline int granularity_to_cxl(int g, u16 *ig)
 {
-	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
+	if (g > SZ_16K || g < CXL_DECODER_MIN_GRANULARITY || !is_power_of_2(g))
 		return -EINVAL;
 	*ig = ilog2(g) - 8;
 	return 0;
@@ -248,7 +252,6 @@  enum cxl_decoder_type {
  */
 #define CXL_DECODER_MAX_INTERLEAVE 16
 
-#define CXL_DECODER_MIN_GRANULARITY 256
 
 /**
  * struct cxl_decoder - Common CXL HDM Decoder Attributes