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(ip72-199-50-187.sd.sd.cox.net [72.199.50.187]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dave@stgolabs.net) by pdx1-sub0-mail-a274.dreamhost.com (Postfix) with ESMTPSA id 4MngXm06Zrz2l; Wed, 12 Oct 2022 11:04:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1665597896; bh=C8JJSk0EYyAqSc9YYXpRIUYnFlP9fh0LNbC+8dBPaMg=; h=From:To:Cc:Subject:Date:Content-Transfer-Encoding; b=NofUNgMRIca5zhIqiUF0L/TQjaQUVA4kPjpM+zTLq3aS7huyU/FNxIzYCe/qpAqdU +qBRkGTp3hwR2yEAuvu5AuuHzGGA36aoLclK3bn91I83L6xdzrr0UbsKrHQgGPg/6I nG1oVgtXsN6HLW+/R5d5vjdDBFJ+4eYmVwCvh3pUfyX7AirdHvolu+5JVkhZQQbaQL G+KGRdqmYrTFUtXn26eWXCHED5Jw3zgL8Wn882ukvSeh3nRWdSLwtw+8YoaSWBXxcq 8YKMjzNcwdfgGJu/H+sMOD6duw2w8rb49vd1v4HPux8KI/TEBb92tkc1vD7ByJ3aI0 sV8ECAfMmRiiA== From: Davidlohr Bueso To: dan.j.williams@intel.com Cc: ira.weiny@intel.com, Jonathan.Cameron@huawei.com, alison.schofield@intel.com, vishal.l.verma@intel.com, bwidawsk@kernel.org, a.manzanares@samsung.com, linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org, dave@stgolabs.net Subject: [PATCH] cxl: Add generic MSI/MSI-X interrupt support Date: Wed, 12 Oct 2022 11:04:32 -0700 Message-Id: <20221012180432.473373-1-dave@stgolabs.net> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Introduce a generic irq table for CXL components/features that can have standard irq support - DOE requires dynamic vector sizing and is not considered here. Create an infrastructure to query the max vectors required for the CXL device. Signed-off-by: Davidlohr Bueso Reviewed-by: Dave Jiang --- drivers/cxl/pci.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index faeb5d9d7a7a..467f2d568e3e 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -428,6 +428,66 @@ static void devm_cxl_pci_create_doe(struct cxl_dev_state *cxlds) } } +/** + * struct cxl_irq_cap - CXL feature that is capable of receiving MSI/MSI-X irqs. + * + * @name: Name of the device generating this interrupt. + * @get_max_msgnum: Get the feature's largest interrupt message number. If the + * feature does not have the Interrupt Supported bit set, then + * return -1. + */ +struct cxl_irq_cap { + const char *name; + int (*get_max_msgnum)(struct cxl_dev_state *cxlds); +}; + +static const struct cxl_irq_cap cxl_irq_cap_table[] = { + { "isolation", NULL }, + { "pmu_overflow", NULL }, + { "mailbox", NULL }, + { "event", NULL }, +}; + +static void cxl_pci_free_irq_vectors(void *data) +{ + pci_free_irq_vectors(data); +} + +static int cxl_pci_alloc_irq_vectors(struct cxl_dev_state *cxlds) +{ + struct device *dev = cxlds->dev; + struct pci_dev *pdev = to_pci_dev(dev); + int rc, i, vectors = -1; + + for (i = 0; i < ARRAY_SIZE(cxl_irq_cap_table); i++) { + int irq; + + if (!cxl_irq_cap_table[i].get_max_msgnum) + continue; + + irq = cxl_irq_cap_table[i].get_max_msgnum(cxlds); + vectors = max_t(int, irq, vectors); + } + + if (vectors == -1) + return -EINVAL; /* no irq support whatsoever */ + + vectors++; + rc = pci_alloc_irq_vectors(pdev, vectors, vectors, + PCI_IRQ_MSIX | PCI_IRQ_MSI); + if (rc < 0) + return rc; + + if (rc != vectors) { + dev_err(dev, "Not enough interrupts; use polling where supported\n"); + /* Some got allocated; clean them up */ + cxl_pci_free_irq_vectors(pdev); + return -ENOSPC; + } + + return devm_add_action_or_reset(dev, cxl_pci_free_irq_vectors, pdev); +} + static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct cxl_register_map map; @@ -498,6 +558,9 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); + /* TODO: When there are users, this return value must be checked */ + cxl_pci_alloc_irq_vectors(cxlds); + if (resource_size(&cxlds->pmem_res) && IS_ENABLED(CONFIG_CXL_PMEM)) rc = devm_cxl_add_nvdimm(&pdev->dev, cxlmd);