From patchwork Sat Feb 18 01:38:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 13145456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 031D5C05027 for ; Sat, 18 Feb 2023 01:38:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229568AbjBRBik (ORCPT ); Fri, 17 Feb 2023 20:38:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229445AbjBRBij (ORCPT ); Fri, 17 Feb 2023 20:38:39 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CD3B5D3DC; Fri, 17 Feb 2023 17:38:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676684318; x=1708220318; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S9pcj8A3kuWdxO/qpytQHbhEZebV7ayvDbM+nYuhP4U=; b=TxFaw0b12xzr6zG62bntBaVm4IBYsJHrFMsRAIhkR7QfKI3QylNexHaU WkLq1i+kZ/sTxr1Sf1jj6y8GcAr9WbZnZJyEbarySQqc4EbdMHq3F1P7e C+ZOhuPClrE0xpGdO9YKlUqrkUI0JF1MrJjJF1FE4/l8equG0NnSYhdpL oby2qbB/6L0sVVKT7tqtSBlxSATX+LYq+aQmtaSEa5oRnDDCTrW9npikr UX0Auyd+WrhZOzDeSMPglMlf++rVDrRRjfYwuANwv6J3MJd9VbPc06AY6 mPVvMZlmWg5PLlOQXFq6v0GSmIaXmuyJf0S0/lRwxW3I8JwaQ/e9kmjV8 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10624"; a="333491010" X-IronPort-AV: E=Sophos;i="5.97,306,1669104000"; d="scan'208";a="333491010" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2023 17:38:38 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10624"; a="620572604" X-IronPort-AV: E=Sophos;i="5.97,306,1669104000"; d="scan'208";a="620572604" Received: from aschofie-mobl2.amr.corp.intel.com (HELO localhost) ([10.252.133.15]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2023 17:38:37 -0800 From: alison.schofield@intel.com To: Dan Williams , Ira Weiny , Vishal Verma , Dave Jiang , Ben Widawsky Cc: Alison Schofield , linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] cxl/hdm: dev_warn() on unsupported mixed mode decoder Date: Fri, 17 Feb 2023 17:38:34 -0800 Message-Id: <20230218013834.31237-1-alison.schofield@intel.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Alison Schofield A mixed mode decoder is programmed with device physical addresses that span both ram and pmem partitions of a memdev. Linux does not support mixed mode decoders. The driver rejects sysfs writes that try to set decoder mode to mixed, and if a resource bieng allocated is not wholly contained in either the pmem or ram partition of a memdev, it is also rejected. Basically, the CXL region driver is not going to create regions with mixed mode decoders, but the BIOS could. If the kernel driver sees the mixed mode decoder, it will fail to enable the region, and emit a dev_dbg() message. A dev_dbg() is not noisy enough in this case. Change the message to be a dev_warn() that explicitly says mixed mode is not supported. Suggested-by: Dan Williams Signed-off-by: Alison Schofield Reviewed-by: Vishal Verma Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang --- drivers/cxl/core/hdm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) base-commit: a5fcd228ca1db9810ba1ed461c90b6ee933b9daf diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 45deda18ed32..9eaf93c8ebb0 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -294,8 +294,8 @@ static int __cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled, else if (resource_contains(&cxlds->ram_res, res)) cxled->mode = CXL_DECODER_RAM; else { - dev_dbg(dev, "decoder%d.%d: %pr mixed\n", port->id, - cxled->cxld.id, cxled->dpa_res); + dev_warn(dev, "decoder%d.%d: %pr mixed mode not supported\n", + port->id, cxled->cxld.id, cxled->dpa_res); cxled->mode = CXL_DECODER_MIXED; }