From patchwork Mon Sep 4 13:28:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 13373889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D2A2C83F2C for ; Mon, 4 Sep 2023 13:29:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230413AbjIDN3O (ORCPT ); Mon, 4 Sep 2023 09:29:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237498AbjIDN3O (ORCPT ); Mon, 4 Sep 2023 09:29:14 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C4CCCD0 for ; Mon, 4 Sep 2023 06:29:10 -0700 (PDT) Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RfTrV4BFcz67K8h; Mon, 4 Sep 2023 21:24:42 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 4 Sep 2023 14:29:08 +0100 From: Jonathan Cameron To: , Michael Tsirkin , Fan Ni , CC: Li Zhijian , Dave Jiang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Subject: [PATCH 2/4] hw/pci-bridge/cxl_upstream: Fix bandwidth entry base unit for SSLBIS Date: Mon, 4 Sep 2023 14:28:04 +0100 Message-ID: <20230904132806.6094-3-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230904132806.6094-1-Jonathan.Cameron@huawei.com> References: <20230904132806.6094-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml500001.china.huawei.com (7.191.163.213) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Dave Jiang According to ACPI spec 6.5 5.2.28.4 System Locality Latency and Bandwidth Information Structure, if the "Entry Base Unit" is 1024 for BW and the matrix entry has the value of 100, the BW is 100 GB/s. So the entry_base_unit should be changed from 1000 to 1024 given the comment notes it's 16GB/s for .latency_bandwidth. Fixes: 882877fc359d ("hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE") Signed-off-by: Dave Jiang Signed-off-by: Jonathan Cameron Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Fan Ni --- hw/pci-bridge/cxl_upstream.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c index 9159f48a8c..2b9cf0cc97 100644 --- a/hw/pci-bridge/cxl_upstream.c +++ b/hw/pci-bridge/cxl_upstream.c @@ -262,7 +262,7 @@ static int build_cdat_table(CDATSubHeader ***cdat_table, void *priv) .length = sslbis_size, }, .data_type = HMATLB_DATA_TYPE_ACCESS_BANDWIDTH, - .entry_base_unit = 1000, + .entry_base_unit = 1024, }, };