@@ -225,26 +225,12 @@ void cxl_component_create_dvsec(CXLComponentState *cxl_cstate,
enum reg_type cxl_dev_type, uint16_t length,
uint16_t type, uint8_t rev, uint8_t *body);
-static inline int cxl_decoder_count_enc(int count)
-{
- switch (count) {
- case 1: return 0;
- case 2: return 1;
- case 4: return 2;
- case 6: return 3;
- case 8: return 4;
- case 10: return 5;
- }
- return 0;
-}
+int cxl_decoder_count_enc(int count);
uint8_t cxl_interleave_ways_enc(int iw, Error **errp);
uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp);
-static inline hwaddr cxl_decode_ig(int ig)
-{
- return 1ULL << (ig + 8);
-}
+hwaddr cxl_decode_ig(int ig);
CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb);
bool cxl_get_hb_passthrough(PCIHostState *hb);
@@ -13,6 +13,24 @@
#include "hw/pci/pci.h"
#include "hw/cxl/cxl.h"
+int cxl_decoder_count_enc(int count)
+{
+ switch (count) {
+ case 1: return 0;
+ case 2: return 1;
+ case 4: return 2;
+ case 6: return 3;
+ case 8: return 4;
+ case 10: return 5;
+ }
+ return 0;
+}
+
+hwaddr cxl_decode_ig(int ig)
+{
+ return 1ULL << (ig + 8);
+}
+
static uint64_t cxl_cache_mem_read_reg(void *opaque, hwaddr offset,
unsigned size)
{