diff mbox series

[v2,4/7] cxl: Fix a checkpatch error

Message ID 20230922113604.3300468-1-jtp.park@samsung.com
State Superseded
Headers show
Series cxl: Fix checkpatch issues | expand

Commit Message

Jeongtae Park Sept. 22, 2023, 11:36 a.m. UTC 
ERROR: Macros with complex values should be enclosed in parentheses

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
---
 drivers/cxl/cxl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jonathan Cameron Sept. 25, 2023, 10:09 a.m. UTC | #1 
On Fri, 22 Sep 2023 20:36:04 +0900
Jeongtae Park <jtp.park@samsung.com> wrote:

> ERROR: Macros with complex values should be enclosed in parentheses
> 
> Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

I checked the places this is used and it won't result in any functional
change so good to tidy it up.



> ---
>  drivers/cxl/cxl.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 76d92561af29..545381355efb 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -142,7 +142,7 @@ static inline int ways_to_eiw(unsigned int ways, u8 *eiw)
>  #define CXL_RAS_HEADER_LOG_OFFSET 0x18
>  #define CXL_RAS_CAPABILITY_LENGTH 0x58
>  #define CXL_HEADERLOG_SIZE SZ_512
> -#define CXL_HEADERLOG_SIZE_U32 SZ_512 / sizeof(u32)
> +#define CXL_HEADERLOG_SIZE_U32 (SZ_512 / sizeof(u32))
>  
>  /* CXL 2.0 8.2.8.1 Device Capabilities Array Register */
>  #define CXLDEV_CAP_ARRAY_OFFSET 0x0
Davidlohr Bueso Sept. 28, 2023, 1:32 a.m. UTC | #2 
On Fri, 22 Sep 2023, Jeongtae Park wrote:

>ERROR: Macros with complex values should be enclosed in parentheses
>
>Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
>Reviewed-by: Dave Jiang <dave.jiang@intel.com>

Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>

>---
> drivers/cxl/cxl.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>index 76d92561af29..545381355efb 100644
>--- a/drivers/cxl/cxl.h
>+++ b/drivers/cxl/cxl.h
>@@ -142,7 +142,7 @@ static inline int ways_to_eiw(unsigned int ways, u8 *eiw)
> #define CXL_RAS_HEADER_LOG_OFFSET 0x18
> #define CXL_RAS_CAPABILITY_LENGTH 0x58
> #define CXL_HEADERLOG_SIZE SZ_512
>-#define CXL_HEADERLOG_SIZE_U32 SZ_512 / sizeof(u32)
>+#define CXL_HEADERLOG_SIZE_U32 (SZ_512 / sizeof(u32))
>
> /* CXL 2.0 8.2.8.1 Device Capabilities Array Register */
> #define CXLDEV_CAP_ARRAY_OFFSET 0x0
>--
>2.34.1
>
diff mbox series

Patch

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 76d92561af29..545381355efb 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -142,7 +142,7 @@  static inline int ways_to_eiw(unsigned int ways, u8 *eiw)
 #define CXL_RAS_HEADER_LOG_OFFSET 0x18
 #define CXL_RAS_CAPABILITY_LENGTH 0x58
 #define CXL_HEADERLOG_SIZE SZ_512
-#define CXL_HEADERLOG_SIZE_U32 SZ_512 / sizeof(u32)
+#define CXL_HEADERLOG_SIZE_U32 (SZ_512 / sizeof(u32))
 
 /* CXL 2.0 8.2.8.1 Device Capabilities Array Register */
 #define CXLDEV_CAP_ARRAY_OFFSET 0x0