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Mon, 22 Apr 2024 18:14:28 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab3.gw.nic.fujitsu.com (Postfix) with ESMTP id 3DDA8200932C6 for ; Mon, 22 Apr 2024 18:14:28 +0900 (JST) Received: from localhost.localdomain (unknown [10.167.225.88]) by edo.cn.fujitsu.com (Postfix) with ESMTP id A36501A000B; Mon, 22 Apr 2024 17:14:27 +0800 (CST) From: Yao Xingtao To: dave@stgolabs.net, jonathan.cameron@huawei.com, dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com, jim.harris@samsung.com Cc: linux-cxl@vger.kernel.org, Yao Xingtao Subject: [PATCH v4 1/2] cxl/core: add passthrough flag to struct cxl_switch_decoder Date: Mon, 22 Apr 2024 05:13:49 -0400 Message-Id: <20240422091350.4701-2-yaoxt.fnst@fujitsu.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240422091350.4701-1-yaoxt.fnst@fujitsu.com> References: <20240422091350.4701-1-yaoxt.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28336.006 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28336.006 X-TMASE-Result: 10--6.745100-10.000000 X-TMASE-MatchedRID: 54gb2yeIOXSCAvsmJ/zu/6oXHZz/dXlxj7hvEKSa/BRBL//DKiVczqKJ 8yeXnfHAjx5X3FdI4UDmn3xyPJAJoh2P280ZiGmRzr16YOzjZ11MVCcj56k8hrgbJOZ434Bsunq BIQj+1JlMgLbAPLc3nKD8el0BdzuoNyl1nd9CIt0URSScn+QSXt0H8LFZNFG7/nnwJ52QYi+pyg CGKFPC+PL0dqdhIhOvYXExMvg8UtWKzA3c+VUMOnvnCQ6wKniu2RcfcR4aT8g= X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 Per CXL specification (8.2.4.20 CXL HDM Decoder Capability Structure in r3.1), the host-bridges with single port and switches with single dport are not affiliated with any instance of the HDM capability structure. Driver will add a passthrough decoder for each of them during init, so the constraints imposed by the HDM capability structure do not apply to the passthrough decoders. By utilizing this flag, we can swiftly ascertain whether a switch decoder qualifies as a passthrough decoder, thereby avoiding the need to conduct a string of capability constraint checks. Signed-off-by: Yao Xingtao Reviewed-by: Jonathan Cameron --- drivers/cxl/core/hdm.c | 1 + drivers/cxl/cxl.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 7d97790b893d..27fb4f9d489e 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -57,6 +57,7 @@ int devm_cxl_add_passthrough_decoder(struct cxl_port *port) if (IS_ERR(cxlsd)) return PTR_ERR(cxlsd); + cxlsd->passthrough = true; device_lock_assert(&port->dev); xa_for_each(&port->dports, index, dport) diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 036d17db68e0..6f562baa164f 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -415,6 +415,7 @@ struct cxl_endpoint_decoder { * struct cxl_switch_decoder - Switch specific CXL HDM Decoder * @cxld: base cxl_decoder object * @nr_targets: number of elements in @target + * @passthrough: indicate whether the decoder is passthrough * @target: active ordered target list in current decoder configuration * * The 'switch' decoder type represents the decoder instances of cxl_port's that @@ -426,6 +427,7 @@ struct cxl_endpoint_decoder { struct cxl_switch_decoder { struct cxl_decoder cxld; int nr_targets; + bool passthrough; struct cxl_dport *target[]; };