From patchwork Fri Aug 16 14:44:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 13766445 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2917D1BE229; Fri, 16 Aug 2024 14:45:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723819514; cv=none; b=fB2yYGmIrC548AfPt31+Tg72wggDzObSea4kC1gkdbYmaxxwcNJUY4RwMMFTk3a7JLR5vWZYvAWbOcEwHwu+mwmsaguipuzKiYtnm+u5Q38MPiHtVESdm83f699zwiT0AO1JL4wlYQnK2HJq1MKwInWVLxWFESLgHFl8gJusIVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723819514; c=relaxed/simple; bh=1C0H7UERFiFZZ/FOaknhjU0DGvDsdbFkKV5LYyGmeyU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mVn/0MvZQZZf6FIKLBmTxP+ijH4QX+wlDziXlSSc9TLHnlk9UJw8SA77xEBKzfihuo/v7SRFkVA8h5l86awCnmxh+hPWtdo33YYPmS4Q/3DWf+41kEfnr8VgPVWujp1wFo9BbNtu13p+oVcqnbrfqEe6kpTwG4pcmGqcDwdikAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JFqFE8tH; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JFqFE8tH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723819512; x=1755355512; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=1C0H7UERFiFZZ/FOaknhjU0DGvDsdbFkKV5LYyGmeyU=; b=JFqFE8tHSav2KQGd+6+Rx0u7yGfUsU0gq5SdcuSuFgOenclbNcu+TBPr UtrJpzYOoEY4+ED+CRYkBkq8zooFDuYAbxi/igte0TpLPFp5TIvhssAzV xwA7eBll+HbNVCwyKmfBt9aczoGNE2/Hqfq6eLwdQbR59KBVcN+ArTaIy h0JNSbHE1hkO0Twr8zBTNF8oy+f4VrGbVtn/8zm8GpD46sHCDHAXmua2R WKQMePkrFh1HLXX4+DcEsF4VPzubF0/Eo9rj7Af8gvbi71xzE9kkDIST3 JqMvo4WrFKsmmbESRuhwHMtCvV/1TN8sl8h7uaHAUd2qORrgT6OBhditn Q==; X-CSE-ConnectionGUID: asbEPllhSaC6sHCUi9dPNA== X-CSE-MsgGUID: Ry9T4v6BSiWP/HzLiW4yiw== X-IronPort-AV: E=McAfee;i="6700,10204,11166"; a="21973003" X-IronPort-AV: E=Sophos;i="6.10,152,1719903600"; d="scan'208";a="21973003" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2024 07:45:02 -0700 X-CSE-ConnectionGUID: U8pMzc6lSeG4FdR229tkSQ== X-CSE-MsgGUID: 79eHHeJmSI64X2b7d3gTUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,152,1719903600"; d="scan'208";a="97205553" Received: from iweiny-mobl.amr.corp.intel.com (HELO localhost) ([10.125.111.52]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2024 07:45:00 -0700 From: Ira Weiny Date: Fri, 16 Aug 2024 09:44:22 -0500 Subject: [PATCH v3 14/25] cxl/events: Split event msgnum configuration from irq setup Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240816-dcd-type2-upstream-v3-14-7c9b96cba6d7@intel.com> References: <20240816-dcd-type2-upstream-v3-0-7c9b96cba6d7@intel.com> In-Reply-To: <20240816-dcd-type2-upstream-v3-0-7c9b96cba6d7@intel.com> To: Dave Jiang , Fan Ni , Jonathan Cameron , Navneet Singh , Chris Mason , Josef Bacik , David Sterba , Petr Mladek , Steven Rostedt , Andy Shevchenko , Rasmus Villemoes , Sergey Senozhatsky , Jonathan Corbet , Andrew Morton Cc: Dan Williams , Davidlohr Bueso , Alison Schofield , Vishal Verma , Ira Weiny , linux-btrfs@vger.kernel.org, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, nvdimm@lists.linux.dev X-Mailer: b4 0.15-dev-37811 X-Developer-Signature: v=1; a=ed25519-sha256; t=1723819456; l=2746; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=1C0H7UERFiFZZ/FOaknhjU0DGvDsdbFkKV5LYyGmeyU=; b=eLI6FcIH8BbOt3V25r60E06E1k5sh5BuWDY3e9vj/BxkThu8JVTivImS6EogqnO979gPFimAm /oE2U85I9lUCI4gqI7XaFOKrDNb4b0Rleeu9O3XCGMx+SjLkDrXX2sm X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= Dynamic Capacity Devices (DCD) require event interrupts to process memory addition or removal. BIOS may have control over non-DCD event processing. DCD interrupt configuration needs to be separate from memory event interrupt configuration. Split cxl_event_config_msgnums() from irq setup in preparation for separate DCD interrupts configuration. Signed-off-by: Ira Weiny Reviewed-by: Dave Jiang Reviewed-by: Fan Ni Reviewed-by: Jonathan Cameron Reviewed-by: Li Ming --- drivers/cxl/pci.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index f7f03599bc83..17bea49bbf4d 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -698,35 +698,31 @@ static int cxl_event_config_msgnums(struct cxl_memdev_state *mds, return cxl_event_get_int_policy(mds, policy); } -static int cxl_event_irqsetup(struct cxl_memdev_state *mds) +static int cxl_event_irqsetup(struct cxl_memdev_state *mds, + struct cxl_event_interrupt_policy *policy) { struct cxl_dev_state *cxlds = &mds->cxlds; - struct cxl_event_interrupt_policy policy; int rc; - rc = cxl_event_config_msgnums(mds, &policy); - if (rc) - return rc; - - rc = cxl_event_req_irq(cxlds, policy.info_settings); + rc = cxl_event_req_irq(cxlds, policy->info_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Info log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.warn_settings); + rc = cxl_event_req_irq(cxlds, policy->warn_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Warn log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.failure_settings); + rc = cxl_event_req_irq(cxlds, policy->failure_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Failure log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.fatal_settings); + rc = cxl_event_req_irq(cxlds, policy->fatal_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Fatal log\n"); return rc; @@ -745,7 +741,7 @@ static bool cxl_event_int_is_fw(u8 setting) static int cxl_event_config(struct pci_host_bridge *host_bridge, struct cxl_memdev_state *mds, bool irq_avail) { - struct cxl_event_interrupt_policy policy; + struct cxl_event_interrupt_policy policy = { 0 }; int rc; /* @@ -773,11 +769,15 @@ static int cxl_event_config(struct pci_host_bridge *host_bridge, return -EBUSY; } + rc = cxl_event_config_msgnums(mds, &policy); + if (rc) + return rc; + rc = cxl_mem_alloc_event_buf(mds); if (rc) return rc; - rc = cxl_event_irqsetup(mds); + rc = cxl_event_irqsetup(mds, &policy); if (rc) return rc;