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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6c534339987sm70416046d6.33.2024.09.13.11.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2024 11:33:21 -0700 (PDT) From: Gregory Price To: linux-cxl@vger.kernel.org Cc: linux-kernel@vger.kernel.org, dave@stgolabs.net, jonathan.cameron@huawei.com, dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com, rrichter@amd.com, terry.bowman@amd.com Subject: [PATCH] cxl/core/port: defer probe when memdev fails to find correct port Date: Fri, 13 Sep 2024 14:32:34 -0400 Message-ID: <20240913183234.17302-1-gourry@gourry.net> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Depending on device/hierarchy readiness, it can be possible for the async probe process to attempt to register an endpoint before the entire port hierarchy is ready. This currently fails with -ENXIO. Return -EPROBE_DEFER to try again later automatically (which is what the local comments already say we should do anyway). Signed-off-by: Gregory Price --- drivers/cxl/core/port.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 1d5007e3795a..d6bebf70d142 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -1553,7 +1553,7 @@ static int add_port_attach_ep(struct cxl_memdev *cxlmd, */ dev_dbg(&cxlmd->dev, "%s is a root dport\n", dev_name(dport_dev)); - return -ENXIO; + return -EPROBE_DEFER; } parent_port = find_cxl_port(dparent, &parent_dport);