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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ5PEPF000001F3.mail.protection.outlook.com (10.167.242.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8026.11 via Frontend Transport; Tue, 1 Oct 2024 00:53:27 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 30 Sep 2024 19:53:21 -0500 From: Smita Koralahalli To: , , CC: Ard Biesheuvel , Alison Schofield , Vishal Verma , "Ira Weiny" , Dan Williams , Jonathan Cameron , Yazen Ghannam , Bowman Terry Subject: [PATCH v2 3/4] acpi/ghes, efi/cper: Recognize and process CXL Protocol Errors. Date: Tue, 1 Oct 2024 00:52:33 +0000 Message-ID: <20241001005234.61409-4-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241001005234.61409-1-Smita.KoralahalliChannabasappa@amd.com> References: <20241001005234.61409-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001F3:EE_|SA1PR12MB6847:EE_ X-MS-Office365-Filtering-Correlation-Id: 4579d8fe-956b-4ad9-328f-08dce1b37643 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: Al59W8A9M/4JLDbSheyLtRGp87nKWpNDuMiM9hOdgWH1AqJYVSEqEuBLzD0CWLBoXHfWOvXXyIoT6msVaUkXEhnjqz6XMZvrltuvBYNscGiRPkcX5K3ebJX61izO2i7JyfP9vVMQD2fKR8EPZBz+YPODGPLR+y0OVSLBV8EcT6a0+5k9UkP+LvDRVoCAKlRMzOz7DputmHJ6qssLEMVfg04He7PI+mZces0TFU2tuNraD6Pe3Ex0A5Vka+z7BDnoq5pC0+VAeNm4IPuj8vVhbmHreNRd2a9eoogQRuDKKiCpLXVl/bCmS5wiGjdLv87LA3XelZB0mWKdqfvUbi9xHkE/ylfULY35CY+MmRy6PF5+nGEc7AStgVt5ZVWLbdH/TSYRbJpBAZaoJ4lgmyM14Rl851Rn/gqKxOBrra8OczbPSVJJtkzvOWWUrNtaZ7vttt4bUUJddKb9bj/wySQj1djp4SBfQ/zRaLQrlf2RSqAPQy+U7sZYrqUT+RAXIUBPlzSghK9oNJjeo9wWDHVqMGEyLhisuWrYLsodhYY0w2drRhddSqY6pvCi0phQex9fX4JsfqIsMRXN4nYgj/Yo/8c7xLKh6TeAxxNmATV39Q2gd1ph/hU8ls/PYYa+LQfAN8rpoVo6zetEJFqiZtdFDOnZW/IYg3jJh6ZxN7NFn/KyISiAbrpdXY+7NjLJ+Z4a8LRhH7Wv1nQKl2PuQ0vk8b9yTeqrzNIFWcC2kR2hf0ksb/GVkBg2e0f5kIJo6blVGyAQxC14OarLk70V3fKQl/ZYr/NZLk8w+Azo/5aTiFtQQYe2wKCAmUfqmULvAGfbzXNg4BARaLMzFDYn/JYRT/FW+JrC/vTdy5qQ/n9vdPa0Dvsk9fiZ71xQh7f2e5bgnn2JUKRgr81gyTY1o+1otEXlq3J5FWhfvLlpy7Yrwnoimv1MtQPm2YB9fribLBey8q5SkrR/v7Oq1se3KLKDzC9YIkdwe/S/zrQx7t6VATilqRH3JUZR/htjZpTNOK9qaGqd+orBFT8TGfiZRF93qPDH4K16bhsEqNT1mPlx5+CEnV30iiZTUIsHHmgdhSHj3YBIf9UzvzX01Xk5CAu39VrlNa5iuZB9mageR7ILLcYz266/LfgSZFMm1wS0Mms3IUAQkjmrvTK4ZDFexGOs0OPTOvx+sTVvQwyMjgBgKunOiqCT3WjMzmnoYNDe9b7slHhPgUgCK/Nn1OlOO5mHpA+D0BFN1jBHAr3kyHdXhUhBRbSyn2XmUgWaDFPiShq5OCaIyrfL6sBEOrNjTwC5IvpGFvuQnxlcvXhH9hwa/ddCpCg5K/X0GaRP5+PP1BPT/ybcTlb/RawZuISpTRs5UmrdjriOkHMHaFrQWPJXUs/TYnEw1ecUKaB5TgYoZIHEVexOxR/gnU1Xb6NuMdnUBMxPq74DXdMj4tzjTg5R//V5JoS+NmGcnPSjllcCU7aP X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 00:53:27.7872 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4579d8fe-956b-4ad9-328f-08dce1b37643 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6847 UEFI v2.10 section N.2.13 defines a CPER record for CXL Protocol errors. Add GHES support to detect CXL CPER Protocol Error Record and Cache Error Severity, Device ID, Device Serial number and CXL RAS capability struct in struct cxl_cper_prot_err. Include this struct as a member of struct cxl_cper_work_data. Signed-off-by: Smita Koralahalli Reviewed-by: Ira Weiny --- v2: Defined array of structures for Device ID and Serial number comparison. p_err -> rec/p_rec. --- drivers/acpi/apei/ghes.c | 10 +++ drivers/firmware/efi/cper_cxl.c | 115 ++++++++++++++++++++++++++++++++ include/cxl/event.h | 26 ++++++++ 3 files changed, 151 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index ada93cfde9ba..9dcf0f78458f 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -717,6 +717,14 @@ static void cxl_cper_post_event(enum cxl_event_type event_type, schedule_work(cxl_cper_work); } +static void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata) +{ + struct cxl_cper_work_data wd; + + if (cxl_cper_handle_prot_err_info(gdata, &wd.p_rec)) + return; +} + int cxl_cper_register_work(struct work_struct *work) { if (cxl_cper_work) @@ -791,6 +799,8 @@ static bool ghes_do_proc(struct ghes *ghes, struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata); cxl_cper_post_event(CXL_CPER_EVENT_MEM_MODULE, rec); + } else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) { + cxl_cper_handle_prot_err(gdata); } else { void *err = acpi_hest_get_payload(gdata); diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c index 4fd8d783993e..08da7764c066 100644 --- a/drivers/firmware/efi/cper_cxl.c +++ b/drivers/firmware/efi/cper_cxl.c @@ -8,6 +8,7 @@ */ #include +#include #include "cper_cxl.h" #define PROT_ERR_VALID_AGENT_TYPE BIT_ULL(0) @@ -44,6 +45,66 @@ enum { USP, /* CXL Upstream Switch Port */ }; +struct agent_info { + const char *string; + bool req_sn; + bool req_sbdf; +}; + +static const struct agent_info agent_info[] = { + [RCD] = { + .string = "Restricted CXL Device", + .req_sbdf = true, + .req_sn = true, + }, + [RCH_DP] = { + .string = "Restricted CXL Host Downstream Port", + .req_sbdf = false, + .req_sn = false, + }, + [DEVICE] = { + .string = "CXL Device", + .req_sbdf = true, + .req_sn = true, + }, + [LD] = { + .string = "CXL Logical Device", + .req_sbdf = true, + .req_sn = true, + }, + [FMLD] = { + .string = "CXL Fabric Manager managed Logical Device", + .req_sbdf = true, + .req_sn = true, + }, + [RP] = { + .string = "CXL Root Port", + .req_sbdf = true, + .req_sn = false, + }, + [DSP] = { + .string = "CXL Downstream Switch Port", + .req_sbdf = true, + .req_sn = false, + }, + [USP] = { + .string = "CXL Upstream Switch Port", + .req_sbdf = true, + .req_sn = false, + }, +}; + +static enum cxl_aer_err_type cper_severity_cxl_aer(int cper_severity) +{ + switch (cper_severity) { + case CPER_SEV_RECOVERABLE: + case CPER_SEV_FATAL: + return CXL_AER_UNCORRECTABLE; + default: + return CXL_AER_CORRECTABLE; + } +} + void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_err) { if (prot_err->valid_bits & PROT_ERR_VALID_AGENT_TYPE) @@ -176,3 +237,57 @@ void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_e sizeof(cxl_ras->header_log), 0); } } + +int cxl_cper_handle_prot_err_info(struct acpi_hest_generic_data *gdata, + struct cxl_cper_prot_err *rec) +{ + struct cper_sec_prot_err *prot_err = acpi_hest_get_payload(gdata); + u8 *dvsec_start, *cap_start; + + if (!(prot_err->valid_bits & PROT_ERR_VALID_DEVICE_ID)) { + pr_err(FW_WARN "No Device ID\n"); + return -EINVAL; + } + + /* + * The device ID or agent address is required for CXL RCD, CXL + * SLD, CXL LD, CXL Fabric Manager Managed LD, CXL Root Port, + * CXL Downstream Switch Port and CXL Upstream Switch Port. + */ + if (!(agent_info[prot_err->agent_type].req_sbdf)) { + pr_err(FW_WARN "Invalid agent type\n"); + return -EINVAL; + } + + rec->segment = prot_err->agent_addr.segment; + rec->bus = prot_err->agent_addr.bus; + rec->device = prot_err->agent_addr.device; + rec->function = prot_err->agent_addr.function; + + if (!(prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG)) { + pr_err(FW_WARN "Invalid Protocol Error log\n"); + return -EINVAL; + } + + dvsec_start = (u8 *)(prot_err + 1); + cap_start = dvsec_start + prot_err->dvsec_len; + rec->cxl_ras = *(struct cxl_ras_capability_regs *)cap_start; + + /* + * Set device serial number unconditionally. + * + * Print a warning message if it is not valid. The device serial + * number is required for CXL RCD, CXL SLD, CXL LD and CXL Fabric + * Manager Managed LD. + */ + if (!(prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER) || + !(agent_info[prot_err->agent_type].req_sn)) + pr_warn(FW_WARN "No Device Serial number\n"); + + rec->lower_dw = prot_err->dev_serial_num.lower_dw; + rec->upper_dw = prot_err->dev_serial_num.upper_dw; + + rec->severity = cper_severity_cxl_aer(gdata->error_severity); + + return 0; +} diff --git a/include/cxl/event.h b/include/cxl/event.h index 57b4630568f6..5b316150556a 100644 --- a/include/cxl/event.h +++ b/include/cxl/event.h @@ -158,11 +158,37 @@ struct cxl_ras_capability_regs { u32 header_log[16]; }; +enum cxl_aer_err_type { + CXL_AER_UNCORRECTABLE, + CXL_AER_CORRECTABLE, +}; + +struct cxl_cper_prot_err { + struct cxl_ras_capability_regs cxl_ras; + + /* Device ID */ + u8 function; + u8 device; + u8 bus; + u16 segment; + + /* Device Serial Number */ + u32 lower_dw; + u32 upper_dw; + + int severity; +}; + struct cxl_cper_work_data { enum cxl_event_type event_type; struct cxl_cper_event_rec rec; + struct cxl_cper_prot_err p_rec; }; +struct acpi_hest_generic_data; +int cxl_cper_handle_prot_err_info(struct acpi_hest_generic_data *gdata, + struct cxl_cper_prot_err *rec); + #ifdef CONFIG_ACPI_APEI_GHES int cxl_cper_register_work(struct work_struct *work); int cxl_cper_unregister_work(struct work_struct *work);