From patchwork Mon Oct 7 23:16:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 13825414 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4ABE1DF26D; Mon, 7 Oct 2024 23:17:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728343043; cv=none; b=k1T1IQpEPHWZMfdxlefLubpiq8QegOaFmVZKPhRDzG8wNh/bgNae87dZfznjKv7dFGmWAeYabA/sWQAFTaZj2FrDh+0n2Hv4s02u2K2t1YjiqT711Lsz0X85QvVwprXryjGrGD/mvjZeyB7slEUtaMuYnTPQC5w7FaKbDCIl/js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728343043; c=relaxed/simple; bh=5T9fYYkH+QE66nOJ/XDmqrgCNV5lOyJkK6gS3fdsJ9I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Z24CaKkU1InfAL5BZ0uPIUJFxiPm34ZrUkzkVrAvWcMhr7G72tvD3uGuUbxz9dQgwhFrnZwuqIxqjPX/MnqCowdt4TVlYaLu37DYObRR2UYF8oWEw139bllwOFx9vgjMz7M3khLd3qUDk3PbjSNugTnjsqNXf+reDDbtTxa3cco= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lMGnOslk; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lMGnOslk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728343039; x=1759879039; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=5T9fYYkH+QE66nOJ/XDmqrgCNV5lOyJkK6gS3fdsJ9I=; b=lMGnOslkeyRnDvOVRX82b/w4tmTvS9tmP3LGJQvaCIFZpcolo3pzR7vD ernrCQVLQSDg8KaK5+3bFi8rRXTvyG+PM6uJoZxClBtQ7xIb39LeBBmly hNYiPFnbcNdJy8t/CUv/kbEWDm4LNctyDKBS8xmWHX3Ol+LdStaKtl9M/ uGZ7ri8HBWZKAKyeNY8tTUxDpJv4fwmjWpj/rsajruvIabtZGKdBFkhQQ KrX2Q5nYNCZLlQ4GKsX5S2VkkP5J1QtP3Fh10ILSuV17OOo2vQKeYtMXM n/eoQ/VT2EhjIAz43s8KEpqLCW/6GqIJtXf/KoVZwa/kQVQQO6Z/RqgR6 w==; X-CSE-ConnectionGUID: mZkwLJQ8RjOj8ndFqhZsdA== X-CSE-MsgGUID: eIogTsA6QxClBoAb7nujEw== X-IronPort-AV: E=McAfee;i="6700,10204,11218"; a="45036967" X-IronPort-AV: E=Sophos;i="6.11,185,1725346800"; d="scan'208";a="45036967" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2024 16:17:04 -0700 X-CSE-ConnectionGUID: ydCewAnES/i9ESQqkhe9mw== X-CSE-MsgGUID: u7QuGj/USnSk0EuW/GFe9A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,185,1725346800"; d="scan'208";a="75309164" Received: from ldmartin-desk2.corp.intel.com (HELO localhost) ([10.125.110.112]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2024 16:17:02 -0700 From: Ira Weiny Date: Mon, 07 Oct 2024 18:16:23 -0500 Subject: [PATCH v4 17/28] cxl/events: Split event msgnum configuration from irq setup Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241007-dcd-type2-upstream-v4-17-c261ee6eeded@intel.com> References: <20241007-dcd-type2-upstream-v4-0-c261ee6eeded@intel.com> In-Reply-To: <20241007-dcd-type2-upstream-v4-0-c261ee6eeded@intel.com> To: Dave Jiang , Fan Ni , Jonathan Cameron , Navneet Singh , Jonathan Corbet , Andrew Morton Cc: Dan Williams , Davidlohr Bueso , Alison Schofield , Vishal Verma , Ira Weiny , linux-btrfs@vger.kernel.org, linux-cxl@vger.kernel.org, linux-doc@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev-37811 X-Developer-Signature: v=1; a=ed25519-sha256; t=1728342968; l=2746; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=5T9fYYkH+QE66nOJ/XDmqrgCNV5lOyJkK6gS3fdsJ9I=; b=ZpXXDhJfZpnl56KpYZebVeMti19Wd5x7Q4RjqpaSIq38yjleKrD1Lhz7I3BUmXbK4/N3BfyW2 LQS2NStnLGbBhPDQInaV3iV1jSFxIzuADOkujs6v95Sc3lBoW9FmRMA X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= Dynamic Capacity Devices (DCD) require event interrupts to process memory addition or removal. BIOS may have control over non-DCD event processing. DCD interrupt configuration needs to be separate from memory event interrupt configuration. Split cxl_event_config_msgnums() from irq setup in preparation for separate DCD interrupts configuration. Signed-off-by: Ira Weiny Reviewed-by: Jonathan Cameron Reviewed-by: Fan Ni --- drivers/cxl/pci.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index fc5ab74448cc..29a863331bec 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -702,35 +702,31 @@ static int cxl_event_config_msgnums(struct cxl_memdev_state *mds, return cxl_event_get_int_policy(mds, policy); } -static int cxl_event_irqsetup(struct cxl_memdev_state *mds) +static int cxl_event_irqsetup(struct cxl_memdev_state *mds, + struct cxl_event_interrupt_policy *policy) { struct cxl_dev_state *cxlds = &mds->cxlds; - struct cxl_event_interrupt_policy policy; int rc; - rc = cxl_event_config_msgnums(mds, &policy); - if (rc) - return rc; - - rc = cxl_event_req_irq(cxlds, policy.info_settings); + rc = cxl_event_req_irq(cxlds, policy->info_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Info log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.warn_settings); + rc = cxl_event_req_irq(cxlds, policy->warn_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Warn log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.failure_settings); + rc = cxl_event_req_irq(cxlds, policy->failure_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Failure log\n"); return rc; } - rc = cxl_event_req_irq(cxlds, policy.fatal_settings); + rc = cxl_event_req_irq(cxlds, policy->fatal_settings); if (rc) { dev_err(cxlds->dev, "Failed to get interrupt for event Fatal log\n"); return rc; @@ -749,7 +745,7 @@ static bool cxl_event_int_is_fw(u8 setting) static int cxl_event_config(struct pci_host_bridge *host_bridge, struct cxl_memdev_state *mds, bool irq_avail) { - struct cxl_event_interrupt_policy policy; + struct cxl_event_interrupt_policy policy = { 0 }; int rc; /* @@ -777,11 +773,15 @@ static int cxl_event_config(struct pci_host_bridge *host_bridge, return -EBUSY; } + rc = cxl_event_config_msgnums(mds, &policy); + if (rc) + return rc; + rc = cxl_mem_alloc_event_buf(mds); if (rc) return rc; - rc = cxl_event_irqsetup(mds); + rc = cxl_event_irqsetup(mds, &policy); if (rc) return rc;