[v8,14/27] sfc: create type2 cxl memdev

Message ID	20241216161042.42108-15-alejandro.lucero-palau@amd.com
State	New
Headers	show Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2086.outbound.protection.outlook.com [40.107.94.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A15B220764B; Mon, 16 Dec 2024 16:11:18 +0000 (UTC) Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: <alejandro.lucero-palau@amd.com> To: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>, <dan.j.williams@intel.com>, <martin.habets@xilinx.com>, <edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>, <pabeni@redhat.com>, <edumazet@google.com>, <dave.jiang@intel.com> CC: Alejandro Lucero <alucerop@amd.com> Subject: [PATCH v8 14/27] sfc: create type2 cxl memdev Date: Mon, 16 Dec 2024 16:10:29 +0000 Message-ID: <20241216161042.42108-15-alejandro.lucero-palau@amd.com> In-Reply-To: <20241216161042.42108-1-alejandro.lucero-palau@amd.com> References: <20241216161042.42108-1-alejandro.lucero-palau@amd.com> Precedence: bulk MIME-Version: 1.0 Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: alejandro.lucero-palau@amd.com does not designate permitted sender hosts)
Series	cxl: add type2 device basic support \| expand [v8,00/27] cxl: add type2 device basic support [v8,01/27] cxl: add type2 device basic support [v8,02/27] sfc: add cxl support using new CXL API [v8,03/27] cxl: add capabilities field to cxl_dev_state and cxl_port [v8,04/27] cxl/pci: add check for validating capabilities [v8,05/27] cxl: move pci generic code [v8,06/27] cxl: add function for type2 cxl regs setup [v8,07/27] sfc: use cxl api for regs setup and checking [v8,08/27] cxl: add functions for resource request/release by a driver [v8,09/27] sfc: request cxl ram resource [v8,10/27] resource: harden resource_contains [v8,11/27] cxl: add function for setting media ready by a driver [v8,12/27] sfc: set cxl media ready [v8,13/27] cxl: prepare memdev creation for type2 [v8,14/27] sfc: create type2 cxl memdev [v8,15/27] cxl: define a driver interface for HPA free space enumeration [v8,16/27] sfc: obtain root decoder with enough HPA free space [v8,17/27] cxl: define a driver interface for DPA allocation [v8,18/27] sfc: get endpoint decoder [v8,19/27] cxl: make region type based on endpoint type [v8,20/27] cxl/region: factor out interleave ways setup [v8,21/27] cxl/region: factor out interleave granularity setup [v8,22/27] cxl: allow region creation by type2 drivers [v8,23/27] cxl: add region flag for precluding a device memory to be used for dax [v8,24/27] sfc: create cxl region [v8,25/27] cxl: add function for obtaining region range [v8,26/27] sfc: update MCDI protocol headers [v8,27/27] sfc: support pio mapping based on cxl

Message ID

20241216161042.42108-15-alejandro.lucero-palau@amd.com

State

New

Headers

Received-SPF: Pass (protection.outlook.com: domain of amd.com designates
 165.204.84.17 as permitted sender) receiver=protection.outlook.com;
 client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C
From: <alejandro.lucero-palau@amd.com>
To: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
	<dan.j.williams@intel.com>, <martin.habets@xilinx.com>,
	<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
	<pabeni@redhat.com>, <edumazet@google.com>, <dave.jiang@intel.com>
CC: Alejandro Lucero <alucerop@amd.com>
Subject: [PATCH v8 14/27] sfc: create type2 cxl memdev
Date: Mon, 16 Dec 2024 16:10:29 +0000
Message-ID: <20241216161042.42108-15-alejandro.lucero-palau@amd.com>
In-Reply-To: <20241216161042.42108-1-alejandro.lucero-palau@amd.com>
References: <20241216161042.42108-1-alejandro.lucero-palau@amd.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain
Received-SPF: None (SATLEXMB03.amd.com: alejandro.lucero-palau@amd.com does
 not designate permitted sender hosts)
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Dec 2024 16:11:12.6681
 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 
 26722352-6044-402e-0fb6-08dd1dec42db
X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: 
 TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com]
X-MS-Exchange-CrossTenant-AuthSource: 
	CH1PEPF0000AD7A.namprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7575

Series

cxl: add type2 device basic support | expand

Commit Message

Lucero Palau, Alejandro Dec. 16, 2024, 4:10 p.m. UTC

From: Alejandro Lucero <alucerop@amd.com>

Use cxl API for creating a cxl memory device using the type2
cxl_dev_state struct.

Signed-off-by: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Acked-by: Edward Cree <ecree.xilinx@gmail.com>
---
 drivers/net/ethernet/sfc/efx_cxl.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
index c982a4cc1119..70b47b7f4d5a 100644
--- a/drivers/net/ethernet/sfc/efx_cxl.c
+++ b/drivers/net/ethernet/sfc/efx_cxl.c
@@ -96,10 +96,19 @@  int efx_cxl_init(struct efx_probe_data *probe_data)
 	 */
 	cxl_set_media_ready(cxl->cxlds);
 
+	cxl->cxlmd = devm_cxl_add_memdev(&pci_dev->dev, cxl->cxlds);
+	if (IS_ERR(cxl->cxlmd)) {
+		pci_err(pci_dev, "CXL accel memdev creation failed");
+		rc = PTR_ERR(cxl->cxlmd);
+		goto err_memdev;
+	}
+
 	probe_data->cxl = cxl;
 
 	return 0;
 
+err_memdev:
+	cxl_release_resource(cxl->cxlds, CXL_RES_RAM);
 err_resource_set:
 	kfree(cxl->cxlds);
 err_state:

[v8,14/27] sfc: create type2 cxl memdev

Commit Message

Patch