@@ -596,8 +596,7 @@ static int add_host_bridge_dport(struct device *match, void *arg)
dport = devm_cxl_add_rch_dport(root_port, bridge, ctx.uid,
ctx.base);
} else {
- dport = devm_cxl_add_dport(root_port, bridge, ctx.uid,
- CXL_RESOURCE_NONE);
+ dport = devm_cxl_add_dport(root_port, bridge, ctx.uid);
}
if (IS_ERR(dport))
@@ -51,7 +51,7 @@ static int match_add_dports(struct pci_dev *pdev, void *data)
return 0;
port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
- dport = devm_cxl_add_dport(port, &pdev->dev, port_num, CXL_RESOURCE_NONE);
+ dport = devm_cxl_add_dport(port, &pdev->dev, port_num);
if (IS_ERR(dport)) {
ctx->error = PTR_ERR(dport);
return PTR_ERR(dport);
@@ -1178,8 +1178,7 @@ static void cxl_dport_unlink(void *data)
static struct cxl_dport *
__devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev,
- int port_id, resource_size_t component_reg_phys,
- resource_size_t rcrb)
+ int port_id, resource_size_t rcrb)
{
char link_name[CXL_TARGET_STRLEN];
struct cxl_dport *dport;
@@ -1256,20 +1255,19 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev,
* @port: the cxl_port that references this dport
* @dport_dev: firmware or PCI device representing the dport
* @port_id: identifier for this dport in a decoder's target list
- * @component_reg_phys: optional location of CXL component registers
*
* Note that dports are appended to the devm release action's of the
* either the port's host (for root ports), or the port itself (for
* switch ports)
*/
struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,
- struct device *dport_dev, int port_id,
- resource_size_t component_reg_phys)
+ struct device *dport_dev,
+ int port_id)
{
struct cxl_dport *dport;
dport = __devm_cxl_add_dport(port, dport_dev, port_id,
- component_reg_phys, CXL_RESOURCE_NONE);
+ CXL_RESOURCE_NONE);
if (IS_ERR(dport)) {
dev_dbg(dport_dev, "failed to add dport to %s: %ld\n",
dev_name(&port->dev), PTR_ERR(dport));
@@ -1302,8 +1300,7 @@ struct cxl_dport *devm_cxl_add_rch_dport(struct cxl_port *port,
return ERR_PTR(-EINVAL);
}
- dport = __devm_cxl_add_dport(port, dport_dev, port_id,
- CXL_RESOURCE_NONE, rcrb);
+ dport = __devm_cxl_add_dport(port, dport_dev, port_id, rcrb);
if (IS_ERR(dport)) {
dev_dbg(dport_dev, "failed to add RCH dport to %s: %ld\n",
dev_name(&port->dev), PTR_ERR(dport));
@@ -766,8 +766,8 @@ struct cxl_port *cxl_mem_find_port(struct cxl_memdev *cxlmd,
bool schedule_cxl_memdev_detach(struct cxl_memdev *cxlmd);
struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,
- struct device *dport, int port_id,
- resource_size_t component_reg_phys);
+ struct device *dport,
+ int port_id);
struct cxl_dport *devm_cxl_add_rch_dport(struct cxl_port *port,
struct device *dport_dev, int port_id,
resource_size_t rcrb);
@@ -968,9 +968,7 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port)
continue;
}
- dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id,
- CXL_RESOURCE_NONE);
-
+ dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id);
if (IS_ERR(dport))
return PTR_ERR(dport);
}
@@ -254,8 +254,7 @@ struct cxl_dport *__wrap_devm_cxl_add_rch_dport(struct cxl_port *port,
struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
if (ops && ops->is_mock_port(dport_dev)) {
- dport = devm_cxl_add_dport(port, dport_dev, port_id,
- CXL_RESOURCE_NONE);
+ dport = devm_cxl_add_dport(port, dport_dev, port_id);
if (!IS_ERR(dport)) {
dport->rcrb.base = rcrb;
dport->rch = true;
dport component registers setup will be triggered in cxl_endpoint_port_probe() when the first endpoint attaching. devm_cxl_add_dport() is not responsible for dport component registers setup anymore, so the component_reg_phys parameter of devm_cxl_add_dport() is unnecessary. Signed-off-by: Li Ming <ming.li@zohomail.com> --- drivers/cxl/acpi.c | 3 +-- drivers/cxl/core/pci.c | 2 +- drivers/cxl/core/port.c | 13 +++++-------- drivers/cxl/cxl.h | 4 ++-- tools/testing/cxl/test/cxl.c | 4 +--- tools/testing/cxl/test/mock.c | 3 +-- 6 files changed, 11 insertions(+), 18 deletions(-)