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De Francesco" , Terry Bowman , Robert Richter Subject: [PATCH v1 03/29] cxl/pci: cxl_hdm_decode_init: Move comment Date: Tue, 7 Jan 2025 15:09:49 +0100 Message-ID: <20250107141015.3367194-4-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250107141015.3367194-1-rrichter@amd.com> References: <20250107141015.3367194-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE6:EE_|PH7PR12MB9151:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ee0b73d-5f90-4084-be73-08dd2f251832 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|7416014|1800799024|376014; X-Microsoft-Antispam-Message-Info: swqwigfJaWuH+xkmVr+h58mtTeEYgVyIpal59D3trVd3Husc8IC2O/Gxn7saLovJL9wlE+fbsOl3dZxnZz2c9aZbbBoeqTtA3oFEDsut6cwvhTODoFb+BvZ08Tzv+62ZohuYsDkqPu0jTgYYRbSPVqfhN+RKJKqTc8NMg8f7W3Y0bI7YCxfMfgBqhZHWJXb62kbrosOXa2ZABpNiX0yb2r1mVzRQT6FTlduNJthA/tEJesdSuxx4ENJ4KpzX8VzVAHNgLT+WVsOQt+HRm5pnHNZPhFyZOdw/9GJkrqhRAlkpQYJgfVZ7joEiA2+7D6CgZu+sEa9kPKtc5ydsRwCvSZxzOk1xvwiyCqBy1SCDr+3znwWfJvxxCXhP6XXJ/lLmBHE+BqB8D6VWxcQJmGPX6eg780FGnDEoktmcNF5o7xMjDW04SBiaebTEvaflhx6hmdN+VXsgeIU1E8koeMN87V1rbcTPlThWKx9gk9bXI7lLG6acVmj6xBDJMk6mtu8zrgTXz5bVbhPACdrjO9UxuaBSwMHLM8ehtfZ8ZI/d9uJyuXCD8v+X3rgFsCNUG6afkwrqgn94gM1jRf4DShsDV1q1SpijF5iNsM9/mn4AJKG1O0ArJ43ejX2Cf6eF8KHcZ+pYv1DqBEj58rhenSUoCKHtCGd8uB3xmarZaY/HF542hoWMo8MgqjNtz9Hs4quf9t3II4koxyLS7PjOOHHQ2LNW92x06EEbhO9VDlEqFRBA39KYBeBX/IHbDB/QqToLC2Ht1FYo1B4CX7nVkCz1rR82FjGWS0Rp6EOX9fiSw9SF0ZLPExPMdFYxc82fgDfyrpwOXab1iuxeHiaYJ7BUtKC8H5LDI+Y4/OMD0DIx4bjKR2EViaoO1GTsC8XalpW9Do0Tx2VX3tWVszUXXaTgZ17Pp2lbU24C5ESpd3sEvkNEw3yXJReRJSS0M7ID9oQDykZvEdbo+sr4I6fqSXBLoiZ1sk9GBSqGecOPmGpfPokva+6eiwnKRx+E7EyJxfi9s36xzBaM5Y104xmLf1L2B0SNV1cPMKJz6WG4r4f+h8qA2erE+N8DtaB5ccA8ZF5jpyVkSJm0wwT2dgnSVRMKGRZh0k8hpUexUdcwDxSjw23GUHANf73dQRaFORq+VI/P4JWcc/lAX58JdLmrBQfHf6F3u0FXsNYDVosPDTm6pvvoxuWskj0HVDsURkc6Uuvzd0MuPLrXJpbywUDJm3AIk9g+JGyAWNcx3s6gMVno2D9Jee7uAxzjPgICb4y2oNakAfzMCQ4JG+q9TIxwK4uMgdv67jVVJrRkqIzEUhghP3mf3b72RhYlMSeoRHf1a+/KD52rOltIDoCCAy6hwTDbPN2xg5G0PILhIDQz5cXgUy/88LSN038sfkc0wyQuALVLUf+BXlQG+cLKnNme3ruNo9u/fgDo1aR776wHKMBv106GrG/YebRvDg7nlvYGL/GsPWI5zrRA7b9Ui7tVjaHWYXZhqsP5yUEf+KIiau6rE2Q= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(7416014)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jan 2025 14:10:52.1190 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ee0b73d-5f90-4084-be73-08dd2f251832 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9151 The comment applies to the check, move it there. Signed-off-by: Robert Richter --- drivers/cxl/core/pci.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index d206378c4cbc..c7050c13f71a 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -419,6 +419,15 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, if (!hdm) return -ENODEV; + /* + * Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base + * [High,Low] when HDM operation is enabled the range register values + * are ignored by the device, but the spec also recommends matching the + * DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges + * are expected even though Linux does not require or maintain that + * match. If at least one DVSEC range is enabled and allowed, skip HDM + * Decoder Capability Enable. + */ if (!info->mem_enabled) { rc = devm_cxl_enable_hdm(&port->dev, cxlhdm); if (rc) @@ -454,15 +463,6 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, return -ENXIO; } - /* - * Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base - * [High,Low] when HDM operation is enabled the range register values - * are ignored by the device, but the spec also recommends matching the - * DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges - * are expected even though Linux does not require or maintain that - * match. If at least one DVSEC range is enabled and allowed, skip HDM - * Decoder Capability Enable. - */ return 0; } EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, "CXL");