| Message ID | 20250211095349.981096-5-rrichter@amd.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | cxl: Address translation support, part 1: Cleanups and refactoring | expand |
On Tue, 11 Feb 2025 10:53:34 +0100 Robert Richter <rrichter@amd.com> wrote: > There are various configuration cases of HDM decoder registers causing > different code paths. Add comments to cxl_hdm_decode_init() to better > explain them. > > Signed-off-by: Robert Richter <rrichter@amd.com> > Reviewed-by: Gregory Price <gourry@gourry.net> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Tested-by: Gregory Price <gourry@gourry.net> > --- > drivers/cxl/core/pci.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index c49efc419285..6333a01e4f19 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -416,9 +416,17 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, > if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled)) > return devm_cxl_enable_mem(&port->dev, cxlds); > > + /* > + * If the HDM Decoder Capability does not exist and DVSEC was > + * not setup, the DVSEC based emulation cannot be used. > + */ > if (!hdm) > return -ENODEV; > > + /* > + * The HDM Decoder Capability exists but is globally disabled. > + */ > + > /* > * Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base > * [High,Low] when HDM operation is enabled the range register values > @@ -426,7 +434,8 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, > * DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges > * are expected even though Linux does not require or maintain that > * match. If at least one DVSEC range is enabled and allowed, skip HDM > - * Decoder Capability Enable. > + * Decoder Capability Enable. Else, use the HDM Decoder Capability and > + * enable it. As per previous. Having an 'else' comment that refers to what happens if the following if is true, just adds to confusion :( So if you are going to move the comment it needs a more substantial rewrite to reflect that we care 'here' about that last bit only. > */ > if (!info->mem_enabled) { > rc = devm_cxl_enable_hdm(&port->dev, cxlhdm);
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index c49efc419285..6333a01e4f19 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -416,9 +416,17 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled)) return devm_cxl_enable_mem(&port->dev, cxlds); + /* + * If the HDM Decoder Capability does not exist and DVSEC was + * not setup, the DVSEC based emulation cannot be used. + */ if (!hdm) return -ENODEV; + /* + * The HDM Decoder Capability exists but is globally disabled. + */ + /* * Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base * [High,Low] when HDM operation is enabled the range register values @@ -426,7 +434,8 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, * DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges * are expected even though Linux does not require or maintain that * match. If at least one DVSEC range is enabled and allowed, skip HDM - * Decoder Capability Enable. + * Decoder Capability Enable. Else, use the HDM Decoder Capability and + * enable it. */ if (!info->mem_enabled) { rc = devm_cxl_enable_hdm(&port->dev, cxlhdm);